Commit 76045bc4 authored by Marek Vasut's avatar Marek Vasut Committed by Alexandre Torgue
Browse files

ARM: dts: stm32: Add QSPI NOR on AV96 



The DH Electronics DHCOR SOM has QSPI NOR on the SoM itself, add it
into the DT.

Reviewed-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: default avatarMarek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: default avatarAlexandre Torgue <alexandre.torgue@st.com>
parent 611325f6

arch/arm/boot/dts/stm32mp157a-avenger96.dts

+20 −0
Original line number Diff line number Diff line
@@ -21,6 +21,7 @@ 
		mmc0 = &sdmmc1;

		serial0 = &uart4;

		serial1 = &uart7;

		spi0 = &qspi;

	};



	chosen {
@@ -314,6 +315,25 @@ 
	vdd_3v3_usbfs-supply = <&vdd_usb>;

};



&qspi {

	pinctrl-names = "default", "sleep";

	pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;

	pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;

	reg = <0x58003000 0x1000>, <0x70000000 0x200000>;

	#address-cells = <1>;

	#size-cells = <0>;

	status = "okay";



	flash0: spi-flash@0 {

		compatible = "jedec,spi-nor";

		reg = <0>;

		spi-rx-bus-width = <4>;

		spi-max-frequency = <108000000>;

		#address-cells = <1>;

		#size-cells = <1>;

	};

};



&rng1 {

	status = "okay";

};