Commit 75fed76e authored by Thomas Gleixner's avatar Thomas Gleixner
Browse files

Merge tag 'timers-v5.20-rc1' of https://git.linaro.org/people/daniel.lezcano/linux into timers/core 

Pull clockevent/source updates from Daniel Lezcano:

  - Add the missing DT bindings for the MTU nomadik timer (Linus
    Walleij)

  - Fix grammar typo in the ARM global timer Kconfig option (Randy
    Dunlap)

  - Add the tegra186 timer and use it on the tegra234 board (Thierry
    Reding)

  - Add the 'CPUXGPT' CPU timer for Mediatek MT6795 and implement a
    workaround to overcome an ATF bug where the timer is not correctly
    initialized (AngeloGioacchino Del Regno)

  - Rework the suspend/resume approach to enable the feature on the
    timer even it is not an active clock and fix a compilation warning
    (Claudiu Beznea)

  - Add the Add R-Car Gen4 timer support along with the DT bindings
    (Wolfram Sang)

  - Add compatible for ti,am654-timer to support AM6 SoC (Tony Lindgren)

  - Fix Kconfig option to put it back to 'bool' instead of 'tristate'
    for the tegra186 (Daniel Lezcano)

  - Sort 'family,type' DT bindings for the Renesas timers (Geert
    Uytterhoeven)

  - Add compatible 'allwinner,sun20i-d1-timer' for Allwinner D1 (Samuel
    Holland)

  - Remove unnecessary (void*) conversions for sun4i (XU pengfei)

  - Remove unnecessary (void*) conversions for sun5i (Li zeming)

Link: https://lore.kernel.org/all/7472984e-f502-5f27-82bf-070127dd85a5@linaro.org
parents e0dccc3b 148399c9

Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml

+1 −0
Original line number Diff line number Diff line
@@ -20,6 +20,7 @@ properties: 
          - allwinner,suniv-f1c100s-timer

      - items:

          - enum:

              - allwinner,sun20i-d1-timer

              - allwinner,sun50i-a64-timer

              - allwinner,sun50i-h6-timer

              - allwinner,sun50i-h616-timer

Documentation/devicetree/bindings/timer/ingenic,tcu.yaml

+2 −2
Original line number Diff line number Diff line
@@ -113,7 +113,7 @@ properties: 
patternProperties:

  "^watchdog@[a-f0-9]+$":

    type: object

    $ref: ../watchdog/watchdog.yaml#

    $ref: /schemas/watchdog/watchdog.yaml#

    properties:

      compatible:

        oneOf:
@@ -145,7 +145,7 @@ patternProperties: 


  "^pwm@[a-f0-9]+$":

    type: object

    $ref: ../pwm/pwm.yaml#

    $ref: /schemas/pwm/pwm.yaml#

    properties:

      compatible:

        oneOf:

Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt

+5 −1
Original line number Diff line number Diff line 
MediaTek Timers

---------------



MediaTek SoCs have two different timers on different platforms,

MediaTek SoCs have different timers on different platforms,

- CPUX (ARM/ARM64 System Timer)

- GPT (General Purpose Timer)

- SYST (System Timer)
@@ -29,6 +30,9 @@ Required properties: 
	* "mediatek,mt7629-timer" for MT7629 compatible timers (SYST)

	* "mediatek,mt6765-timer" for MT6765 and all above compatible timers (SYST)



	For those SoCs that use CPUX

	* "mediatek,mt6795-systimer" for MT6795 compatible timers (CPUX)



- reg: Should contain location and length for timer register.

- clocks: Should contain system clock.

Documentation/devicetree/bindings/timer/renesas,cmt.yaml

+14 −2
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@@ -80,7 +80,6 @@ properties: 
              - renesas,r8a77980-cmt0     # 32-bit CMT0 on R-Car V3H

              - renesas,r8a77990-cmt0     # 32-bit CMT0 on R-Car E3

              - renesas,r8a77995-cmt0     # 32-bit CMT0 on R-Car D3

              - renesas,r8a779a0-cmt0     # 32-bit CMT0 on R-Car V3U

          - const: renesas,rcar-gen3-cmt0 # 32-bit CMT0 on R-Car Gen3 and RZ/G2



      - items:
@@ -97,9 +96,20 @@ properties: 
              - renesas,r8a77980-cmt1     # 48-bit CMT on R-Car V3H

              - renesas,r8a77990-cmt1     # 48-bit CMT on R-Car E3

              - renesas,r8a77995-cmt1     # 48-bit CMT on R-Car D3

              - renesas,r8a779a0-cmt1     # 48-bit CMT on R-Car V3U

          - const: renesas,rcar-gen3-cmt1 # 48-bit CMT on R-Car Gen3 and RZ/G2



      - items:

          - enum:

              - renesas,r8a779a0-cmt0     # 32-bit CMT0 on R-Car V3U

              - renesas,r8a779f0-cmt0     # 32-bit CMT0 on R-Car S4-8

          - const: renesas,rcar-gen4-cmt0 # 32-bit CMT0 on R-Car Gen4



      - items:

          - enum:

              - renesas,r8a779a0-cmt1     # 48-bit CMT on R-Car V3U

              - renesas,r8a779f0-cmt1     # 48-bit CMT on R-Car S4-8

          - const: renesas,rcar-gen4-cmt1 # 48-bit CMT on R-Car Gen4



  reg:

    maxItems: 1
@@ -135,6 +145,7 @@ allOf: 
            enum:

              - renesas,rcar-gen2-cmt0

              - renesas,rcar-gen3-cmt0

              - renesas,rcar-gen4-cmt0

    then:

      properties:

        interrupts:
@@ -148,6 +159,7 @@ allOf: 
            enum:

              - renesas,rcar-gen2-cmt1

              - renesas,rcar-gen3-cmt1

              - renesas,rcar-gen4-cmt1

    then:

      properties:

        interrupts:

Documentation/devicetree/bindings/timer/st,nomadik-mtu.yaml

0 → 100644
+58 −0
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

# Copyright 2022 Linaro Ltd.

%YAML 1.2

---

$id: "http://devicetree.org/schemas/timer/st,nomadik-mtu.yaml#"

$schema: "http://devicetree.org/meta-schemas/core.yaml#"



title: ST Microelectronics Nomadik Multi-Timer Unit MTU Timer



maintainers:

  - Linus Walleij <linus.walleij@linaro.org>



description: This timer is found in the ST Microelectronics Nomadik

  SoCs STn8800, STn8810 and STn8815 as well as in ST-Ericsson DB8500.



properties:

  compatible:

    items:

      - const: st,nomadik-mtu



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  clocks:

    description: The first clock named TIMCLK clocks the actual timers and

      the second clock clocks the digital interface to the interconnect.

    maxItems: 2



  clock-names:

    items:

      - const: timclk

      - const: apb_pclk



required:

  - compatible

  - reg

  - interrupts

  - clocks

  - clock-names



additionalProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/irq.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/mfd/dbx500-prcmu.h>

    timer@a03c6000 {

      compatible = "st,nomadik-mtu";

      reg = <0xa03c6000 0x1000>;

      interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;



      clocks = <&prcmu_clk PRCMU_TIMCLK>, <&prcc_pclk 6 6>;

      clock-names = "timclk", "apb_pclk";

    };