Unverified Commit 75e6d724 authored by Yash Shah's avatar Yash Shah Committed by Palmer Dabbelt
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dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC 



Add new compatible strings in cpus.yaml to support the E71 and U74 CPU
cores ("harts") that are present on FU740-C000 SoC.

Signed-off-by: default avatarYash Shah <yash.shah@sifive.com>
Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
parent 507308b8

Documentation/devicetree/bindings/riscv/cpus.yaml

+6 −0
Original line number Diff line number Diff line
@@ -28,11 +28,17 @@ properties: 
      - items:

          - enum:

              - sifive,rocket0

              - sifive,bullet0

              - sifive,e5

              - sifive,e7

              - sifive,e51

              - sifive,e71

              - sifive,u54-mc

              - sifive,u74-mc

              - sifive,u54

              - sifive,u74

              - sifive,u5

              - sifive,u7

          - const: riscv

      - const: riscv    # Simulator only

    description: