Commit 75d36df6 authored by Hector Martin's avatar Hector Martin Committed by Lorenzo Pieralisi
Browse files

PCI: apple: Fix REFCLK1 enable/poll logic 

REFCLK1 has req/ack bits that need to be programmed, just like REFCLK0.

Link: https://lore.kernel.org/r/20211117140044.193865-1-marcan@marcan.st


Fixes: 1e33888f ("PCI: apple: Add initial hardware bring-up")
Signed-off-by: default avatarHector Martin <marcan@marcan.st>
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: default avatarMarc Zyngier <maz@kernel.org>
parent 754bb7ad

drivers/pci/controller/pcie-apple.c

+4 −3
Original line number Diff line number Diff line
@@ -42,8 +42,9 @@ 
#define   CORE_FABRIC_STAT_MASK		0x001F001F

#define CORE_LANE_CFG(port)		(0x84000 + 0x4000 * (port))

#define   CORE_LANE_CFG_REFCLK0REQ	BIT(0)

#define   CORE_LANE_CFG_REFCLK1		BIT(1)

#define   CORE_LANE_CFG_REFCLK1REQ	BIT(1)

#define   CORE_LANE_CFG_REFCLK0ACK	BIT(2)

#define   CORE_LANE_CFG_REFCLK1ACK	BIT(3)

#define   CORE_LANE_CFG_REFCLKEN	(BIT(9) | BIT(10))

#define CORE_LANE_CTL(port)		(0x84004 + 0x4000 * (port))

#define   CORE_LANE_CTL_CFGACC		BIT(15)
@@ -482,9 +483,9 @@ static int apple_pcie_setup_refclk(struct apple_pcie *pcie, 
	if (res < 0)

		return res;



	rmw_set(CORE_LANE_CFG_REFCLK1, pcie->base + CORE_LANE_CFG(port->idx));

	rmw_set(CORE_LANE_CFG_REFCLK1REQ, pcie->base + CORE_LANE_CFG(port->idx));

	res = readl_relaxed_poll_timeout(pcie->base + CORE_LANE_CFG(port->idx),

					 stat, stat & CORE_LANE_CFG_REFCLK1,

					 stat, stat & CORE_LANE_CFG_REFCLK1ACK,

					 100, 50000);



	if (res < 0)