Commit 75c2b7ed authored by Dmytro Laktyushkin's avatar Dmytro Laktyushkin Committed by Alex Deucher
Browse files

drm/amd/display: fix seamless odm transitions 



Add missing programming and function pointers

Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Acked-by: default avatarStylon Wang <stylon.wang@amd.com>
Signed-off-by: default avatarDmytro Laktyushkin <dmytro.laktyushkin@amd.com>
Reviewed-by: default avatarCharlene Liu <Charlene.Liu@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 24e461e8

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c

+11 −0
Original line number Diff line number Diff line
@@ -1741,6 +1741,17 @@ static void dcn20_program_pipe( 


		if (hws->funcs.setup_vupdate_interrupt)

			hws->funcs.setup_vupdate_interrupt(dc, pipe_ctx);



		if (hws->funcs.calculate_dccg_k1_k2_values && dc->res_pool->dccg->funcs->set_pixel_rate_div) {

			unsigned int k1_div, k2_div;



			hws->funcs.calculate_dccg_k1_k2_values(pipe_ctx, &k1_div, &k2_div);



			dc->res_pool->dccg->funcs->set_pixel_rate_div(

				dc->res_pool->dccg,

				pipe_ctx->stream_res.tg->inst,

				k1_div, k2_div);

		}

	}



	if (pipe_ctx->update_flags.bits.odm)

drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.c

+1 −1
Original line number Diff line number Diff line
@@ -98,7 +98,7 @@ static void optc32_set_odm_combine(struct timing_generator *optc, int *opp_id, i 
	optc1->opp_count = opp_cnt;

}



static void optc32_set_h_timing_div_manual_mode(struct timing_generator *optc, bool manual_mode)

void optc32_set_h_timing_div_manual_mode(struct timing_generator *optc, bool manual_mode)

{

	struct optc *optc1 = DCN10TG_FROM_TG(optc);

drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.h

+1 −0
Original line number Diff line number Diff line
@@ -179,5 +179,6 @@ 
	SF(OTG0_OTG_DRR_CONTROL, OTG_V_TOTAL_LAST_USED_BY_DRR, mask_sh)



void dcn32_timing_generator_init(struct optc *optc1);

void optc32_set_h_timing_div_manual_mode(struct timing_generator *optc, bool manual_mode);



#endif /* __DC_OPTC_DCN32_H__ */