Commit 75a0c6a5 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski
Browse files

arm64: dts: exynos: align pinctrl with dtschema in Exynos850 



Align the pin controller related nodes with dtschema.  No functional
change expected.

Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: default avatarSam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20220111201722.327219-13-krzysztof.kozlowski@canonical.com
parent daeb1c2b

arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi

+28 −28
Original line number Diff line number Diff line
@@ -13,7 +13,7 @@ 
#include <dt-bindings/pinctrl/samsung.h>



&pinctrl_alive {

	gpa0: gpa0 {

	gpa0: gpa0-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;
@@ -30,7 +30,7 @@ 
			     <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;

	};



	gpa1: gpa1 {

	gpa1: gpa1-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;
@@ -47,7 +47,7 @@ 
			     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;

	};



	gpa2: gpa2 {

	gpa2: gpa2-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;
@@ -64,7 +64,7 @@ 
			     <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;

	};



	gpa3: gpa3 {

	gpa3: gpa3-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;
@@ -81,7 +81,7 @@ 
			     <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;

	};



	gpa4: gpa4 {

	gpa4: gpa4-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;
@@ -94,7 +94,7 @@ 
			     <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;

	};



	gpq0: gpq0 {

	gpq0: gpq0-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;
@@ -134,7 +134,7 @@ 
};



&pinctrl_cmgp {

	gpm0: gpm0 {

	gpm0: gpm0-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;
@@ -144,7 +144,7 @@ 
		interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;

	};



	gpm1: gpm1 {

	gpm1: gpm1-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;
@@ -154,7 +154,7 @@ 
		interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;

	};



	gpm2: gpm2 {

	gpm2: gpm2-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;
@@ -164,7 +164,7 @@ 
		interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;

	};



	gpm3: gpm3 {

	gpm3: gpm3-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;
@@ -174,7 +174,7 @@ 
		interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;

	};



	gpm4: gpm4 {

	gpm4: gpm4-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;
@@ -184,7 +184,7 @@ 
		interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;

	};



	gpm5: gpm5 {

	gpm5: gpm5-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;
@@ -194,7 +194,7 @@ 
		interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;

	};



	gpm6: gpm6 {

	gpm6: gpm6-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;
@@ -204,7 +204,7 @@ 
		interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;

	};



	gpm7: gpm7 {

	gpm7: gpm7-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;
@@ -276,7 +276,7 @@ 
};



&pinctrl_aud {

	gpb0: gpb0 {

	gpb0: gpb0-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;
@@ -284,7 +284,7 @@ 
		#interrupt-cells = <2>;

	};



	gpb1: gpb1 {

	gpb1: gpb1-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;
@@ -342,7 +342,7 @@ 
};



&pinctrl_hsi {

	gpf2: gpf2 {

	gpf2: gpf2-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;
@@ -387,7 +387,7 @@ 
};



&pinctrl_core {

	gpf0: gpf0 {

	gpf0: gpf0-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;
@@ -395,7 +395,7 @@ 
		#interrupt-cells = <2>;

	};



	gpf1: gpf1 {

	gpf1: gpf1-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;
@@ -454,7 +454,7 @@ 
};



&pinctrl_peri {

	gpc0: gpc0 {

	gpc0: gpc0-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;
@@ -462,7 +462,7 @@ 
		#interrupt-cells = <2>;

	};



	gpc1: gpc1 {

	gpc1: gpc1-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;
@@ -470,7 +470,7 @@ 
		#interrupt-cells = <2>;

	};



	gpg0: gpg0 {

	gpg0: gpg0-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;
@@ -478,7 +478,7 @@ 
		#interrupt-cells = <2>;

	};



	gpg1: gpg1 {

	gpg1: gpg1-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;
@@ -486,7 +486,7 @@ 
		#interrupt-cells = <2>;

	};



	gpg2: gpg2 {

	gpg2: gpg2-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;
@@ -494,7 +494,7 @@ 
		#interrupt-cells = <2>;

	};



	gpg3: gpg3 {

	gpg3: gpg3-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;
@@ -502,14 +502,14 @@ 
		#interrupt-cells = <2>;

	};



	gpp0: gpp0 {

	gpp0: gpp0-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};

	gpp1: gpp1 {

	gpp1: gpp1-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;
@@ -517,7 +517,7 @@ 
		#interrupt-cells = <2>;

	};



	gpp2: gpp2 {

	gpp2: gpp2-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;