Commit 7525022d authored by Michael Walle's avatar Michael Walle Committed by Shawn Guo
Browse files

arm64: dts: ls1043a: use constants in the clockgen phandle



Now that we have constants, use them. This is just a mechanical change.

Signed-off-by: default avatarMichael Walle <michael@walle.cc>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 99314eb1
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+48 −25
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@
 * Mingkai Hu <Mingkai.hu@freescale.com>
 */

#include <dt-bindings/clock/fsl,qoriq-clockgen.h>
#include <dt-bindings/thermal/thermal.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>

@@ -44,7 +45,7 @@
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x0>;
			clocks = <&clockgen 1 0>;
			clocks = <&clockgen QORIQ_CLK_CMUX 0>;
			next-level-cache = <&l2>;
			cpu-idle-states = <&CPU_PH20>;
			#cooling-cells = <2>;
@@ -54,7 +55,7 @@
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x1>;
			clocks = <&clockgen 1 0>;
			clocks = <&clockgen QORIQ_CLK_CMUX 0>;
			next-level-cache = <&l2>;
			cpu-idle-states = <&CPU_PH20>;
			#cooling-cells = <2>;
@@ -64,7 +65,7 @@
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x2>;
			clocks = <&clockgen 1 0>;
			clocks = <&clockgen QORIQ_CLK_CMUX 0>;
			next-level-cache = <&l2>;
			cpu-idle-states = <&CPU_PH20>;
			#cooling-cells = <2>;
@@ -74,7 +75,7 @@
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x3>;
			clocks = <&clockgen 1 0>;
			clocks = <&clockgen QORIQ_CLK_CMUX 0>;
			next-level-cache = <&l2>;
			cpu-idle-states = <&CPU_PH20>;
			#cooling-cells = <2>;
@@ -402,7 +403,10 @@
			reg-names = "QuadSPI", "QuadSPI-memory";
			interrupts = <0 99 0x4>;
			clock-names = "qspi_en", "qspi";
			clocks = <&clockgen 4 0>, <&clockgen 4 0>;
			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
					    QORIQ_CLK_PLL_DIV(1)>,
				 <&clockgen QORIQ_CLK_PLATFORM_PLL
					    QORIQ_CLK_PLL_DIV(1)>;
			status = "disabled";
		};

@@ -501,7 +505,8 @@
			reg = <0x0 0x2100000 0x0 0x10000>;
			interrupts = <0 64 0x4>;
			clock-names = "dspi";
			clocks = <&clockgen 4 0>;
			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
					    QORIQ_CLK_PLL_DIV(1)>;
			spi-num-chipselects = <5>;
			big-endian;
			status = "disabled";
@@ -514,7 +519,8 @@
			reg = <0x0 0x2110000 0x0 0x10000>;
			interrupts = <0 65 0x4>;
			clock-names = "dspi";
			clocks = <&clockgen 4 0>;
			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
					    QORIQ_CLK_PLL_DIV(1)>;
			spi-num-chipselects = <5>;
			big-endian;
			status = "disabled";
@@ -527,7 +533,8 @@
			reg = <0x0 0x2180000 0x0 0x10000>;
			interrupts = <0 56 0x4>;
			clock-names = "i2c";
			clocks = <&clockgen 4 0>;
			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
					    QORIQ_CLK_PLL_DIV(1)>;
			dmas = <&edma0 1 39>,
			       <&edma0 1 38>;
			dma-names = "tx", "rx";
@@ -541,7 +548,8 @@
			reg = <0x0 0x2190000 0x0 0x10000>;
			interrupts = <0 57 0x4>;
			clock-names = "i2c";
			clocks = <&clockgen 4 0>;
			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
					    QORIQ_CLK_PLL_DIV(1)>;
			status = "disabled";
		};

@@ -552,7 +560,8 @@
			reg = <0x0 0x21a0000 0x0 0x10000>;
			interrupts = <0 58 0x4>;
			clock-names = "i2c";
			clocks = <&clockgen 4 0>;
			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
					    QORIQ_CLK_PLL_DIV(1)>;
			status = "disabled";
		};

@@ -563,7 +572,8 @@
			reg = <0x0 0x21b0000 0x0 0x10000>;
			interrupts = <0 59 0x4>;
			clock-names = "i2c";
			clocks = <&clockgen 4 0>;
			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
					    QORIQ_CLK_PLL_DIV(1)>;
			status = "disabled";
		};

@@ -571,28 +581,32 @@
			compatible = "fsl,ns16550", "ns16550a";
			reg = <0x00 0x21c0500 0x0 0x100>;
			interrupts = <0 54 0x4>;
			clocks = <&clockgen 4 0>;
			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
					    QORIQ_CLK_PLL_DIV(1)>;
		};

		duart1: serial@21c0600 {
			compatible = "fsl,ns16550", "ns16550a";
			reg = <0x00 0x21c0600 0x0 0x100>;
			interrupts = <0 54 0x4>;
			clocks = <&clockgen 4 0>;
			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
					    QORIQ_CLK_PLL_DIV(1)>;
		};

		duart2: serial@21d0500 {
			compatible = "fsl,ns16550", "ns16550a";
			reg = <0x0 0x21d0500 0x0 0x100>;
			interrupts = <0 55 0x4>;
			clocks = <&clockgen 4 0>;
			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
					    QORIQ_CLK_PLL_DIV(1)>;
		};

		duart3: serial@21d0600 {
			compatible = "fsl,ns16550", "ns16550a";
			reg = <0x0 0x21d0600 0x0 0x100>;
			interrupts = <0 55 0x4>;
			clocks = <&clockgen 4 0>;
			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
					    QORIQ_CLK_PLL_DIV(1)>;
		};

		gpio1: gpio@2300000 {
@@ -704,7 +718,7 @@
			compatible = "fsl,ls1021a-lpuart";
			reg = <0x0 0x2950000 0x0 0x1000>;
			interrupts = <0 48 0x4>;
			clocks = <&clockgen 0 0>;
			clocks = <&clockgen QORIQ_CLK_SYSCLK 0>;
			clock-names = "ipg";
			status = "disabled";
		};
@@ -713,7 +727,8 @@
			compatible = "fsl,ls1021a-lpuart";
			reg = <0x0 0x2960000 0x0 0x1000>;
			interrupts = <0 49 0x4>;
			clocks = <&clockgen 4 0>;
			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
					    QORIQ_CLK_PLL_DIV(1)>;
			clock-names = "ipg";
			status = "disabled";
		};
@@ -722,7 +737,8 @@
			compatible = "fsl,ls1021a-lpuart";
			reg = <0x0 0x2970000 0x0 0x1000>;
			interrupts = <0 50 0x4>;
			clocks = <&clockgen 4 0>;
			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
					    QORIQ_CLK_PLL_DIV(1)>;
			clock-names = "ipg";
			status = "disabled";
		};
@@ -731,7 +747,8 @@
			compatible = "fsl,ls1021a-lpuart";
			reg = <0x0 0x2980000 0x0 0x1000>;
			interrupts = <0 51 0x4>;
			clocks = <&clockgen 4 0>;
			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
					    QORIQ_CLK_PLL_DIV(1)>;
			clock-names = "ipg";
			status = "disabled";
		};
@@ -740,7 +757,8 @@
			compatible = "fsl,ls1021a-lpuart";
			reg = <0x0 0x2990000 0x0 0x1000>;
			interrupts = <0 52 0x4>;
			clocks = <&clockgen 4 0>;
			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
					    QORIQ_CLK_PLL_DIV(1)>;
			clock-names = "ipg";
			status = "disabled";
		};
@@ -749,7 +767,8 @@
			compatible = "fsl,ls1021a-lpuart";
			reg = <0x0 0x29a0000 0x0 0x1000>;
			interrupts = <0 53 0x4>;
			clocks = <&clockgen 4 0>;
			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
					    QORIQ_CLK_PLL_DIV(1)>;
			clock-names = "ipg";
			status = "disabled";
		};
@@ -758,7 +777,8 @@
			compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
			reg = <0x0 0x2ad0000 0x0 0x10000>;
			interrupts = <0 83 0x4>;
			clocks = <&clockgen 4 0>;
			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
					    QORIQ_CLK_PLL_DIV(1)>;
			clock-names = "wdog";
			big-endian;
		};
@@ -775,8 +795,10 @@
			dma-channels = <32>;
			big-endian;
			clock-names = "dmamux0", "dmamux1";
			clocks = <&clockgen 4 0>,
				 <&clockgen 4 0>;
			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
					    QORIQ_CLK_PLL_DIV(1)>,
				 <&clockgen QORIQ_CLK_PLATFORM_PLL
					    QORIQ_CLK_PLL_DIV(1)>;
		};

		usb0: usb@2f00000 {
@@ -818,7 +840,8 @@
				<0x0 0x20140520 0x0 0x4>;
			reg-names = "ahci", "sata-ecc";
			interrupts = <0 69 0x4>;
			clocks = <&clockgen 4 0>;
			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
					    QORIQ_CLK_PLL_DIV(1)>;
			dma-coherent;
		};

+4 −2
Original line number Diff line number Diff line
@@ -6,6 +6,8 @@
 *
 */

#include <dt-bindings/clock/fsl,qoriq-clockgen.h>

fman0: fman@1a00000 {
	#address-cells = <1>;
	#size-cells = <1>;
@@ -15,7 +17,7 @@ fman0: fman@1a00000 {
	reg = <0x0 0x1a00000 0x0 0xfe000>;
	interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
		     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
	clocks = <&clockgen 3 0>;
	clocks = <&clockgen QORIQ_CLK_FMAN 0>;
	clock-names = "fmanclk";
	fsl,qman-channel-range = <0x800 0x10>;
	ptimer-handle = <&ptp_timer0>;
@@ -81,6 +83,6 @@ ptp_timer0: ptp-timer@1afe000 {
	compatible = "fsl,fman-ptp-timer";
	reg = <0x0 0x1afe000 0x0 0x1000>;
	interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
	clocks = <&clockgen 3 0>;
	clocks = <&clockgen QORIQ_CLK_FMAN 0>;
	fsl,extts-fifo;
};