Commit 7513cc8a authored by Catalin Marinas's avatar Catalin Marinas Committed by Will Deacon
Browse files

arm64: Change the cpuinfo_arm64 member type for some sysregs to u64



The architecture has been updated and the CTR_EL0, CNTFRQ_EL0,
DCZID_EL0, MIDR_EL1, REVIDR_EL1 registers are all 64-bit, even if most
of them have a RES0 top 32-bit.

Change their type to u64 in struct cpuinfo_arm64.

Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Acked-by: default avatarMark Rutland <mark.rutland@arm.com>
Reviewed-by: default avatarSuzuki K Poulose <Suzuki.Poulose@arm.com>
Link: https://lore.kernel.org/r/20210526193621.21559-2-catalin.marinas@arm.com


Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent c4681547
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+5 −5
Original line number Diff line number Diff line
@@ -15,11 +15,11 @@
struct cpuinfo_arm64 {
	struct cpu	cpu;
	struct kobject	kobj;
	u32		reg_ctr;
	u32		reg_cntfrq;
	u32		reg_dczid;
	u32		reg_midr;
	u32		reg_revidr;
	u64		reg_ctr;
	u64		reg_cntfrq;
	u64		reg_dczid;
	u64		reg_midr;
	u64		reg_revidr;

	u64		reg_id_aa64dfr0;
	u64		reg_id_aa64dfr1;
+1 −1
Original line number Diff line number Diff line
@@ -246,7 +246,7 @@ static struct kobj_type cpuregs_kobj_type = {
		struct cpuinfo_arm64 *info = kobj_to_cpuinfo(kobj);		\
										\
		if (info->reg_midr)						\
			return sprintf(buf, "0x%016x\n", info->reg_##_field);	\
			return sprintf(buf, "0x%016llx\n", info->reg_##_field);	\
		else								\
			return 0;						\
	}									\