Unverified Commit 75034eb5 authored by Peter Ujfalusi's avatar Peter Ujfalusi Committed by Mark Brown
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ASoC: SOF: Intel: MTL: Don't access EM2 



This reverts commit 2b5a30ca ("ASoC: SOF: Intel: MTL: Enable
DMI L1").

It came to our attention that the access to the EM2 register is restricted
to the DSP side on MTL compared to prior platforms.

Writing to it from the host side has no effect (negative or positive), it
is better to remove the code to not cause confusion and wrong impression.

Signed-off-by: default avatarPeter Ujfalusi <peter.ujfalusi@linux.intel.com>
Link: https://lore.kernel.org/r/20230310133454.15362-1-peter.ujfalusi@linux.intel.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 8987986b

sound/soc/sof/intel/mtl.c

+0 −3
Original line number Diff line number Diff line
@@ -280,9 +280,6 @@ static int mtl_dsp_post_fw_run(struct snd_sof_dev *sdev) 
	}



	hda_sdw_int_enable(sdev, true);



	/* enable DMI L1 */

	snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, MTL_EM2, MTL_EM2_L1SEN, MTL_EM2_L1SEN);

	return 0;

}

sound/soc/sof/intel/mtl.h

+0 −2
Original line number Diff line number Diff line
@@ -28,8 +28,6 @@ 
#define MTL_HFINTIPPTR_PTR_MASK		GENMASK(20, 0)



#define MTL_HDA_VS_D0I3C		0x1D4A

#define MTL_EM2				0x1c44

#define MTL_EM2_L1SEN			BIT(13)



#define MTL_DSP2CXCAP_PRIMARY_CORE	0x178D00

#define MTL_DSP2CXCTL_PRIMARY_CORE	0x178D04