Commit 74f10824 authored by Vincenzo Frascino's avatar Vincenzo Frascino Committed by Catalin Marinas
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arm64: mte: Add specific SIGSEGV codes 



Add MTE-specific SIGSEGV codes to siginfo.h and update the x86
BUILD_BUG_ON(NSIGSEGV != 7) compile check.

Signed-off-by: default avatarVincenzo Frascino <vincenzo.frascino@arm.com>
[catalin.marinas@arm.com: renamed precise/imprecise to sync/async]
[catalin.marinas@arm.com: dropped #ifdef __aarch64__, renumbered]
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Acked-by: default avatar"Eric W. Biederman" <ebiederm@xmission.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Will Deacon <will@kernel.org>
parent 2ac638fc

arch/x86/kernel/signal_compat.c

+1 −1
Original line number Diff line number Diff line
@@ -27,7 +27,7 @@ static inline void signal_compat_build_tests(void) 
	 */

	BUILD_BUG_ON(NSIGILL  != 11);

	BUILD_BUG_ON(NSIGFPE  != 15);

	BUILD_BUG_ON(NSIGSEGV != 7);

	BUILD_BUG_ON(NSIGSEGV != 9);

	BUILD_BUG_ON(NSIGBUS  != 5);

	BUILD_BUG_ON(NSIGTRAP != 5);

	BUILD_BUG_ON(NSIGCHLD != 6);

include/uapi/asm-generic/siginfo.h

+3 −1
Original line number Diff line number Diff line
@@ -229,7 +229,9 @@ typedef struct siginfo { 
#define SEGV_ACCADI	5	/* ADI not enabled for mapped object */

#define SEGV_ADIDERR	6	/* Disrupting MCD error */

#define SEGV_ADIPERR	7	/* Precise MCD exception */

#define NSIGSEGV	7

#define SEGV_MTEAERR	8	/* Asynchronous ARM MTE error */

#define SEGV_MTESERR	9	/* Synchronous ARM MTE exception */

#define NSIGSEGV	9



/*

 * SIGBUS si_codes