Commit 74d40ace authored by Vladimir Zapolskiy's avatar Vladimir Zapolskiy Committed by Bjorn Andersson
Browse files

clk: qcom: clk-alpha-pll: limit exported symbols to GPL licensed code 



Unify all exported PLL clock configuration functions and data structures
as GPL symbols.

Reviewed-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: default avatarStephen Boyd <sboyd@kernel.org>
Reviewed-by: default avatarVinod Koul <vkoul@kernel.org>
Signed-off-by: default avatarVladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220701062720.2757874-1-vladimir.zapolskiy@linaro.org
parent 94bed9bb

drivers/clk/qcom/clk-alpha-pll.c

+4 −4
Original line number Diff line number Diff line
@@ -1823,7 +1823,7 @@ const struct clk_ops clk_alpha_pll_lucid_5lpe_ops = { 
	.round_rate = clk_alpha_pll_round_rate,

	.set_rate = alpha_pll_lucid_5lpe_set_rate,

};

EXPORT_SYMBOL(clk_alpha_pll_lucid_5lpe_ops);

EXPORT_SYMBOL_GPL(clk_alpha_pll_lucid_5lpe_ops);



const struct clk_ops clk_alpha_pll_fixed_lucid_5lpe_ops = {

	.enable = alpha_pll_lucid_5lpe_enable,
@@ -1832,14 +1832,14 @@ const struct clk_ops clk_alpha_pll_fixed_lucid_5lpe_ops = { 
	.recalc_rate = clk_trion_pll_recalc_rate,

	.round_rate = clk_alpha_pll_round_rate,

};

EXPORT_SYMBOL(clk_alpha_pll_fixed_lucid_5lpe_ops);

EXPORT_SYMBOL_GPL(clk_alpha_pll_fixed_lucid_5lpe_ops);



const struct clk_ops clk_alpha_pll_postdiv_lucid_5lpe_ops = {

	.recalc_rate = clk_alpha_pll_postdiv_fabia_recalc_rate,

	.round_rate = clk_alpha_pll_postdiv_fabia_round_rate,

	.set_rate = clk_lucid_5lpe_pll_postdiv_set_rate,

};

EXPORT_SYMBOL(clk_alpha_pll_postdiv_lucid_5lpe_ops);

EXPORT_SYMBOL_GPL(clk_alpha_pll_postdiv_lucid_5lpe_ops);



void clk_zonda_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,

			     const struct alpha_pll_config *config)
@@ -1992,7 +1992,7 @@ const struct clk_ops clk_alpha_pll_zonda_ops = { 
	.round_rate = clk_alpha_pll_round_rate,

	.set_rate = clk_zonda_pll_set_rate,

};

EXPORT_SYMBOL(clk_alpha_pll_zonda_ops);

EXPORT_SYMBOL_GPL(clk_alpha_pll_zonda_ops);



static int alpha_pll_lucid_evo_enable(struct clk_hw *hw)

{