Commit 74ad37a3 authored by Tanmay Shah's avatar Tanmay Shah Committed by Mathieu Poirier
Browse files

mailbox: zynqmp: Fix IPI isr handling 



Multiple IPI channels are mapped to same interrupt handler.
Current isr implementation handles only one channel per isr.
Fix this behavior by checking isr status bit of all child
mailbox nodes.

Fixes: 4981b82b ("mailbox: ZynqMP IPI mailbox controller")
Signed-off-by: default avatarTanmay Shah <tanmay.shah@amd.com>
Acked-by: default avatarMichal Simek <michal.simek@amd.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20230311012407.1292118-3-tanmay.shah@amd.com


Signed-off-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
parent f72f805e

drivers/mailbox/zynqmp-ipi-mailbox.c

+3 −3
Original line number Diff line number Diff line
@@ -152,7 +152,7 @@ static irqreturn_t zynqmp_ipi_interrupt(int irq, void *data) 
	struct zynqmp_ipi_message *msg;

	u64 arg0, arg3;

	struct arm_smccc_res res;

	int ret, i;

	int ret, i, status = IRQ_NONE;



	(void)irq;

	arg0 = SMC_IPI_MAILBOX_STATUS_ENQUIRY;
@@ -170,11 +170,11 @@ static irqreturn_t zynqmp_ipi_interrupt(int irq, void *data) 
				memcpy_fromio(msg->data, mchan->req_buf,

					      msg->len);

				mbox_chan_received_data(chan, (void *)msg);

				return IRQ_HANDLED;

				status = IRQ_HANDLED;

			}

		}

	}

	return IRQ_NONE;

	return status;

}



/**