Commit 743767d6 authored by Stephane Eranian's avatar Stephane Eranian Committed by Peter Zijlstra
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perf/x86/intel/uncore: Add events for Intel SPR IMC PMU 



Add missing clockticks and cas_count_* events for Intel SapphireRapids IMC
PMU. These events are useful to measure memory bandwidth.

Signed-off-by: default avatarStephane Eranian <eranian@google.com>
Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: default avatarKan Liang <kan.liang@linux.intel.com>
Link: https://lore.kernel.org/r/20230419214241.2310385-1-eranian@google.com
parent 15def34e

arch/x86/events/intel/uncore_snbep.c

+12 −0
Original line number Diff line number Diff line
@@ -6068,6 +6068,17 @@ static struct intel_uncore_ops spr_uncore_mmio_ops = { 
	.read_counter		= uncore_mmio_read_counter,

};



static struct uncore_event_desc spr_uncore_imc_events[] = {

	INTEL_UNCORE_EVENT_DESC(clockticks,      "event=0x01,umask=0x00"),

	INTEL_UNCORE_EVENT_DESC(cas_count_read,  "event=0x05,umask=0xcf"),

	INTEL_UNCORE_EVENT_DESC(cas_count_read.scale, "6.103515625e-5"),

	INTEL_UNCORE_EVENT_DESC(cas_count_read.unit, "MiB"),

	INTEL_UNCORE_EVENT_DESC(cas_count_write, "event=0x05,umask=0xf0"),

	INTEL_UNCORE_EVENT_DESC(cas_count_write.scale, "6.103515625e-5"),

	INTEL_UNCORE_EVENT_DESC(cas_count_write.unit, "MiB"),

	{ /* end: all zeroes */ },

};



static struct intel_uncore_type spr_uncore_imc = {

	SPR_UNCORE_COMMON_FORMAT(),

	.name			= "imc",
@@ -6075,6 +6086,7 @@ static struct intel_uncore_type spr_uncore_imc = { 
	.fixed_ctr		= SNR_IMC_MMIO_PMON_FIXED_CTR,

	.fixed_ctl		= SNR_IMC_MMIO_PMON_FIXED_CTL,

	.ops			= &spr_uncore_mmio_ops,

	.event_descs		= spr_uncore_imc_events,

};



static void spr_uncore_pci_enable_event(struct intel_uncore_box *box,