Commit 74099e20 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'mips_6.5_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux 

Pull MIPS fixes from Thomas Bogendoerfer:

 - fixes for KVM

 - fix for loongson build and cpu probing

 - DT fixes

* tag 'mips_6.5_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
  MIPS: kvm: Fix build error with KVM_MIPS_DEBUG_COP0_COUNTERS enabled
  MIPS: dts: add missing space before {
  MIPS: Loongson: Fix build error when make modules_install
  MIPS: KVM: Fix NULL pointer dereference
  MIPS: Loongson: Fix cpu_probe_loongson() again
parents 76487845 3a6dbb69

arch/mips/Makefile

+3 −7
Original line number Diff line number Diff line
@@ -181,16 +181,12 @@ endif 
cflags-$(CONFIG_CAVIUM_CN63XXP1) += -Wa,-mfix-cn63xxp1

cflags-$(CONFIG_CPU_BMIPS)	+= -march=mips32 -Wa,-mips32 -Wa,--trap



cflags-$(CONFIG_CPU_LOONGSON2E) += -march=loongson2e -Wa,--trap

cflags-$(CONFIG_CPU_LOONGSON2F) += -march=loongson2f -Wa,--trap

cflags-$(CONFIG_CPU_LOONGSON2E) += $(call cc-option,-march=loongson2e) -Wa,--trap

cflags-$(CONFIG_CPU_LOONGSON2F) += $(call cc-option,-march=loongson2f) -Wa,--trap

cflags-$(CONFIG_CPU_LOONGSON64) += $(call cc-option,-march=loongson3a,-march=mips64r2) -Wa,--trap

# Some -march= flags enable MMI instructions, and GCC complains about that

# support being enabled alongside -msoft-float. Thus explicitly disable MMI.

cflags-$(CONFIG_CPU_LOONGSON2EF) += $(call cc-option,-mno-loongson-mmi)

ifdef CONFIG_CPU_LOONGSON64

cflags-$(CONFIG_CPU_LOONGSON64)	+= -Wa,--trap

cflags-$(CONFIG_CC_IS_GCC) += -march=loongson3a

cflags-$(CONFIG_CC_IS_CLANG) += -march=mips64r2

endif

cflags-$(CONFIG_CPU_LOONGSON64) += $(call cc-option,-mno-loongson-mmi)



cflags-$(CONFIG_CPU_R4000_WORKAROUNDS)	+= $(call cc-option,-mfix-r4000,)

arch/mips/include/asm/kvm_host.h

+3 −3
Original line number Diff line number Diff line
@@ -317,7 +317,7 @@ struct kvm_vcpu_arch { 
	unsigned int aux_inuse;



	/* COP0 State */

	struct mips_coproc *cop0;

	struct mips_coproc cop0;



	/* Resume PC after MMIO completion */

	unsigned long io_pc;
@@ -698,7 +698,7 @@ static inline bool kvm_mips_guest_can_have_fpu(struct kvm_vcpu_arch *vcpu) 
static inline bool kvm_mips_guest_has_fpu(struct kvm_vcpu_arch *vcpu)

{

	return kvm_mips_guest_can_have_fpu(vcpu) &&

		kvm_read_c0_guest_config1(vcpu->cop0) & MIPS_CONF1_FP;

		kvm_read_c0_guest_config1(&vcpu->cop0) & MIPS_CONF1_FP;

}



static inline bool kvm_mips_guest_can_have_msa(struct kvm_vcpu_arch *vcpu)
@@ -710,7 +710,7 @@ static inline bool kvm_mips_guest_can_have_msa(struct kvm_vcpu_arch *vcpu) 
static inline bool kvm_mips_guest_has_msa(struct kvm_vcpu_arch *vcpu)

{

	return kvm_mips_guest_can_have_msa(vcpu) &&

		kvm_read_c0_guest_config3(vcpu->cop0) & MIPS_CONF3_MSA;

		kvm_read_c0_guest_config3(&vcpu->cop0) & MIPS_CONF3_MSA;

}



struct kvm_mips_callbacks {

arch/mips/kernel/cpu-probe.c

+3 −6
Original line number Diff line number Diff line
@@ -1677,7 +1677,10 @@ static inline void decode_cpucfg(struct cpuinfo_mips *c) 


static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)

{

	c->cputype = CPU_LOONGSON64;



	/* All Loongson processors covered here define ExcCode 16 as GSExc. */

	decode_configs(c);

	c->options |= MIPS_CPU_GSEXCEX;



	switch (c->processor_id & PRID_IMP_MASK) {
@@ -1687,7 +1690,6 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu) 
		case PRID_REV_LOONGSON2K_R1_1:

		case PRID_REV_LOONGSON2K_R1_2:

		case PRID_REV_LOONGSON2K_R1_3:

			c->cputype = CPU_LOONGSON64;

			__cpu_name[cpu] = "Loongson-2K";

			set_elf_platform(cpu, "gs264e");

			set_isa(c, MIPS_CPU_ISA_M64R2);
@@ -1700,14 +1702,12 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu) 
		switch (c->processor_id & PRID_REV_MASK) {

		case PRID_REV_LOONGSON3A_R2_0:

		case PRID_REV_LOONGSON3A_R2_1:

			c->cputype = CPU_LOONGSON64;

			__cpu_name[cpu] = "ICT Loongson-3";

			set_elf_platform(cpu, "loongson3a");

			set_isa(c, MIPS_CPU_ISA_M64R2);

			break;

		case PRID_REV_LOONGSON3A_R3_0:

		case PRID_REV_LOONGSON3A_R3_1:

			c->cputype = CPU_LOONGSON64;

			__cpu_name[cpu] = "ICT Loongson-3";

			set_elf_platform(cpu, "loongson3a");

			set_isa(c, MIPS_CPU_ISA_M64R2);
@@ -1727,7 +1727,6 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu) 
		c->ases &= ~MIPS_ASE_VZ; /* VZ of Loongson-3A2000/3000 is incomplete */

		break;

	case PRID_IMP_LOONGSON_64G:

		c->cputype = CPU_LOONGSON64;

		__cpu_name[cpu] = "ICT Loongson-3";

		set_elf_platform(cpu, "loongson3a");

		set_isa(c, MIPS_CPU_ISA_M64R2);
@@ -1737,8 +1736,6 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu) 
		panic("Unknown Loongson Processor ID!");

		break;

	}



	decode_configs(c);

}

#else

static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu) { }

arch/mips/kvm/emulate.c

+11 −11
Original line number Diff line number Diff line
@@ -312,7 +312,7 @@ int kvm_get_badinstrp(u32 *opc, struct kvm_vcpu *vcpu, u32 *out) 
 */

int kvm_mips_count_disabled(struct kvm_vcpu *vcpu)

{

	struct mips_coproc *cop0 = vcpu->arch.cop0;

	struct mips_coproc *cop0 = &vcpu->arch.cop0;



	return	(vcpu->arch.count_ctl & KVM_REG_MIPS_COUNT_CTL_DC) ||

		(kvm_read_c0_guest_cause(cop0) & CAUSEF_DC);
@@ -384,7 +384,7 @@ static inline ktime_t kvm_mips_count_time(struct kvm_vcpu *vcpu) 
 */

static u32 kvm_mips_read_count_running(struct kvm_vcpu *vcpu, ktime_t now)

{

	struct mips_coproc *cop0 = vcpu->arch.cop0;

	struct mips_coproc *cop0 = &vcpu->arch.cop0;

	ktime_t expires, threshold;

	u32 count, compare;

	int running;
@@ -444,7 +444,7 @@ static u32 kvm_mips_read_count_running(struct kvm_vcpu *vcpu, ktime_t now) 
 */

u32 kvm_mips_read_count(struct kvm_vcpu *vcpu)

{

	struct mips_coproc *cop0 = vcpu->arch.cop0;

	struct mips_coproc *cop0 = &vcpu->arch.cop0;



	/* If count disabled just read static copy of count */

	if (kvm_mips_count_disabled(vcpu))
@@ -502,7 +502,7 @@ ktime_t kvm_mips_freeze_hrtimer(struct kvm_vcpu *vcpu, u32 *count) 
static void kvm_mips_resume_hrtimer(struct kvm_vcpu *vcpu,

				    ktime_t now, u32 count)

{

	struct mips_coproc *cop0 = vcpu->arch.cop0;

	struct mips_coproc *cop0 = &vcpu->arch.cop0;

	u32 compare;

	u64 delta;

	ktime_t expire;
@@ -603,7 +603,7 @@ int kvm_mips_restore_hrtimer(struct kvm_vcpu *vcpu, ktime_t before, 
 */

void kvm_mips_write_count(struct kvm_vcpu *vcpu, u32 count)

{

	struct mips_coproc *cop0 = vcpu->arch.cop0;

	struct mips_coproc *cop0 = &vcpu->arch.cop0;

	ktime_t now;



	/* Calculate bias */
@@ -649,7 +649,7 @@ void kvm_mips_init_count(struct kvm_vcpu *vcpu, unsigned long count_hz) 
 */

int kvm_mips_set_count_hz(struct kvm_vcpu *vcpu, s64 count_hz)

{

	struct mips_coproc *cop0 = vcpu->arch.cop0;

	struct mips_coproc *cop0 = &vcpu->arch.cop0;

	int dc;

	ktime_t now;

	u32 count;
@@ -696,7 +696,7 @@ int kvm_mips_set_count_hz(struct kvm_vcpu *vcpu, s64 count_hz) 
 */

void kvm_mips_write_compare(struct kvm_vcpu *vcpu, u32 compare, bool ack)

{

	struct mips_coproc *cop0 = vcpu->arch.cop0;

	struct mips_coproc *cop0 = &vcpu->arch.cop0;

	int dc;

	u32 old_compare = kvm_read_c0_guest_compare(cop0);

	s32 delta = compare - old_compare;
@@ -779,7 +779,7 @@ void kvm_mips_write_compare(struct kvm_vcpu *vcpu, u32 compare, bool ack) 
 */

static ktime_t kvm_mips_count_disable(struct kvm_vcpu *vcpu)

{

	struct mips_coproc *cop0 = vcpu->arch.cop0;

	struct mips_coproc *cop0 = &vcpu->arch.cop0;

	u32 count;

	ktime_t now;
@@ -806,7 +806,7 @@ static ktime_t kvm_mips_count_disable(struct kvm_vcpu *vcpu) 
 */

void kvm_mips_count_disable_cause(struct kvm_vcpu *vcpu)

{

	struct mips_coproc *cop0 = vcpu->arch.cop0;

	struct mips_coproc *cop0 = &vcpu->arch.cop0;



	kvm_set_c0_guest_cause(cop0, CAUSEF_DC);

	if (!(vcpu->arch.count_ctl & KVM_REG_MIPS_COUNT_CTL_DC))
@@ -826,7 +826,7 @@ void kvm_mips_count_disable_cause(struct kvm_vcpu *vcpu) 
 */

void kvm_mips_count_enable_cause(struct kvm_vcpu *vcpu)

{

	struct mips_coproc *cop0 = vcpu->arch.cop0;

	struct mips_coproc *cop0 = &vcpu->arch.cop0;

	u32 count;



	kvm_clear_c0_guest_cause(cop0, CAUSEF_DC);
@@ -852,7 +852,7 @@ void kvm_mips_count_enable_cause(struct kvm_vcpu *vcpu) 
 */

int kvm_mips_set_count_ctl(struct kvm_vcpu *vcpu, s64 count_ctl)

{

	struct mips_coproc *cop0 = vcpu->arch.cop0;

	struct mips_coproc *cop0 = &vcpu->arch.cop0;

	s64 changed = count_ctl ^ vcpu->arch.count_ctl;

	s64 delta;

	ktime_t expire, now;

arch/mips/kvm/mips.c

+8 −8
Original line number Diff line number Diff line
@@ -649,7 +649,7 @@ static int kvm_mips_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices) 
static int kvm_mips_get_reg(struct kvm_vcpu *vcpu,

			    const struct kvm_one_reg *reg)

{

	struct mips_coproc *cop0 = vcpu->arch.cop0;

	struct mips_coproc *cop0 = &vcpu->arch.cop0;

	struct mips_fpu_struct *fpu = &vcpu->arch.fpu;

	int ret;

	s64 v;
@@ -761,7 +761,7 @@ static int kvm_mips_get_reg(struct kvm_vcpu *vcpu, 
static int kvm_mips_set_reg(struct kvm_vcpu *vcpu,

			    const struct kvm_one_reg *reg)

{

	struct mips_coproc *cop0 = vcpu->arch.cop0;

	struct mips_coproc *cop0 = &vcpu->arch.cop0;

	struct mips_fpu_struct *fpu = &vcpu->arch.fpu;

	s64 v;

	s64 vs[2];
@@ -1086,7 +1086,7 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) 
int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)

{

	return kvm_mips_pending_timer(vcpu) ||

		kvm_read_c0_guest_cause(vcpu->arch.cop0) & C_TI;

		kvm_read_c0_guest_cause(&vcpu->arch.cop0) & C_TI;

}



int kvm_arch_vcpu_dump_regs(struct kvm_vcpu *vcpu)
@@ -1110,7 +1110,7 @@ int kvm_arch_vcpu_dump_regs(struct kvm_vcpu *vcpu) 
	kvm_debug("\thi: 0x%08lx\n", vcpu->arch.hi);

	kvm_debug("\tlo: 0x%08lx\n", vcpu->arch.lo);



	cop0 = vcpu->arch.cop0;

	cop0 = &vcpu->arch.cop0;

	kvm_debug("\tStatus: 0x%08x, Cause: 0x%08x\n",

		  kvm_read_c0_guest_status(cop0),

		  kvm_read_c0_guest_cause(cop0));
@@ -1232,7 +1232,7 @@ static int __kvm_mips_handle_exit(struct kvm_vcpu *vcpu) 


	case EXCCODE_TLBS:

		kvm_debug("TLB ST fault:  cause %#x, status %#x, PC: %p, BadVaddr: %#lx\n",

			  cause, kvm_read_c0_guest_status(vcpu->arch.cop0), opc,

			  cause, kvm_read_c0_guest_status(&vcpu->arch.cop0), opc,

			  badvaddr);



		++vcpu->stat.tlbmiss_st_exits;
@@ -1304,7 +1304,7 @@ static int __kvm_mips_handle_exit(struct kvm_vcpu *vcpu) 
		kvm_get_badinstr(opc, vcpu, &inst);

		kvm_err("Exception Code: %d, not yet handled, @ PC: %p, inst: 0x%08x  BadVaddr: %#lx Status: %#x\n",

			exccode, opc, inst, badvaddr,

			kvm_read_c0_guest_status(vcpu->arch.cop0));

			kvm_read_c0_guest_status(&vcpu->arch.cop0));

		kvm_arch_vcpu_dump_regs(vcpu);

		run->exit_reason = KVM_EXIT_INTERNAL_ERROR;

		ret = RESUME_HOST;
@@ -1377,7 +1377,7 @@ int noinstr kvm_mips_handle_exit(struct kvm_vcpu *vcpu) 
/* Enable FPU for guest and restore context */

void kvm_own_fpu(struct kvm_vcpu *vcpu)

{

	struct mips_coproc *cop0 = vcpu->arch.cop0;

	struct mips_coproc *cop0 = &vcpu->arch.cop0;

	unsigned int sr, cfg5;



	preempt_disable();
@@ -1421,7 +1421,7 @@ void kvm_own_fpu(struct kvm_vcpu *vcpu) 
/* Enable MSA for guest and restore context */

void kvm_own_msa(struct kvm_vcpu *vcpu)

{

	struct mips_coproc *cop0 = vcpu->arch.cop0;

	struct mips_coproc *cop0 = &vcpu->arch.cop0;

	unsigned int sr, cfg5;



	preempt_disable();