Commit 73a09d21 authored by Russell King's avatar Russell King
Browse files

Merge branch 'for-next' of git://git.pengutronix.de/git/ukl/linux into devel-stable 



Conflicts:
	arch/arm/include/asm/cputype.h

Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parents 6dbe51c2 6ebd4d03

arch/arm/Kconfig

+2 −1
Original line number Diff line number Diff line
@@ -1684,8 +1684,9 @@ config SCHED_HRTICK 
	def_bool HIGH_RES_TIMERS



config THUMB2_KERNEL

	bool "Compile the kernel in Thumb-2 mode"

	bool "Compile the kernel in Thumb-2 mode" if !CPU_THUMBONLY

	depends on CPU_V7 && !CPU_V6 && !CPU_V6K

	default y if CPU_THUMBONLY

	select AEABI

	select ARM_ASM_UNIFIED

	select ARM_UNWIND

arch/arm/include/asm/cp15.h

+15 −1
Original line number Diff line number Diff line
@@ -42,6 +42,8 @@ 
#define vectors_high()	(0)

#endif



#ifdef CONFIG_CPU_CP15



extern unsigned long cr_no_alignment;	/* defined in entry-armv.S */

extern unsigned long cr_alignment;	/* defined in entry-armv.S */
@@ -82,6 +84,18 @@ static inline void set_copro_access(unsigned int val) 
	isb();

}



#endif

#else /* ifdef CONFIG_CPU_CP15 */



/*

 * cr_alignment and cr_no_alignment are tightly coupled to cp15 (at least in the

 * minds of the developers). Yielding 0 for machines without a cp15 (and making

 * it read-only) is fine for most cases and saves quite some #ifdeffery.

 */

#define cr_no_alignment	UL(0)

#define cr_alignment	UL(0)



#endif /* ifdef CONFIG_CPU_CP15 / else */



#endif /* ifndef __ASSEMBLY__ */



#endif

arch/arm/include/asm/cputype.h

+42 −19
Original line number Diff line number Diff line
@@ -38,6 +38,24 @@ 
#define MPIDR_AFFINITY_LEVEL(mpidr, level) \

	((mpidr >> (MPIDR_LEVEL_BITS * level)) & MPIDR_LEVEL_MASK)



#define ARM_CPU_IMP_ARM			0x41

#define ARM_CPU_IMP_INTEL		0x69



#define ARM_CPU_PART_ARM1136		0xB360

#define ARM_CPU_PART_ARM1156		0xB560

#define ARM_CPU_PART_ARM1176		0xB760

#define ARM_CPU_PART_ARM11MPCORE	0xB020

#define ARM_CPU_PART_CORTEX_A8		0xC080

#define ARM_CPU_PART_CORTEX_A9		0xC090

#define ARM_CPU_PART_CORTEX_A5		0xC050

#define ARM_CPU_PART_CORTEX_A15		0xC0F0

#define ARM_CPU_PART_CORTEX_A7		0xC070



#define ARM_CPU_XSCALE_ARCH_MASK	0xe000

#define ARM_CPU_XSCALE_ARCH_V1		0x2000

#define ARM_CPU_XSCALE_ARCH_V2		0x4000

#define ARM_CPU_XSCALE_ARCH_V3		0x6000



extern unsigned int processor_id;



#ifdef CONFIG_CPU_CP15
@@ -50,6 +68,7 @@ extern unsigned int processor_id; 
		    : "cc");						\

		__val;							\

	})



#define read_cpuid_ext(ext_reg)						\

	({								\

		unsigned int __val;					\
@@ -59,29 +78,24 @@ extern unsigned int processor_id; 
		    : "cc");						\

		__val;							\

	})

#else

#define read_cpuid(reg) (processor_id)

#define read_cpuid_ext(reg) 0

#endif



#define ARM_CPU_IMP_ARM			0x41

#define ARM_CPU_IMP_INTEL		0x69

#else /* ifdef CONFIG_CPU_CP15 */



#define ARM_CPU_PART_ARM1136		0xB360

#define ARM_CPU_PART_ARM1156		0xB560

#define ARM_CPU_PART_ARM1176		0xB760

#define ARM_CPU_PART_ARM11MPCORE	0xB020

#define ARM_CPU_PART_CORTEX_A8		0xC080

#define ARM_CPU_PART_CORTEX_A9		0xC090

#define ARM_CPU_PART_CORTEX_A5		0xC050

#define ARM_CPU_PART_CORTEX_A15		0xC0F0

#define ARM_CPU_PART_CORTEX_A7		0xC070

/*

 * read_cpuid and read_cpuid_ext should only ever be called on machines that

 * have cp15 so warn on other usages.

 */

#define read_cpuid(reg)							\

	({								\

		WARN_ON_ONCE(1);					\

		0;							\

	})



#define ARM_CPU_XSCALE_ARCH_MASK	0xe000

#define ARM_CPU_XSCALE_ARCH_V1		0x2000

#define ARM_CPU_XSCALE_ARCH_V2		0x4000

#define ARM_CPU_XSCALE_ARCH_V3		0x6000

#define read_cpuid_ext(reg) read_cpuid(reg)



#endif /* ifdef CONFIG_CPU_CP15 / else */



#ifdef CONFIG_CPU_CP15

/*

 * The CPU ID never changes at run time, so we might as well tell the

 * compiler that it's constant.  Use this function to read the CPU ID
@@ -92,6 +106,15 @@ static inline unsigned int __attribute_const__ read_cpuid_id(void) 
	return read_cpuid(CPUID_ID);

}



#else /* ifdef CONFIG_CPU_CP15 */



static inline unsigned int __attribute_const__ read_cpuid_id(void)

{

	return processor_id;

}



#endif /* ifdef CONFIG_CPU_CP15 / else */



static inline unsigned int __attribute_const__ read_cpuid_implementor(void)

{

	return (read_cpuid_id() & 0xFF000000) >> 24;

arch/arm/include/asm/glue-df.h

+10 −10
Original line number Diff line number Diff line
@@ -18,12 +18,12 @@ 
 *	================

 *

 *	We have the following to choose from:

 *	  arm6          - ARM6 style

 *	  arm7		- ARM7 style

 *	  v4_early	- ARMv4 without Thumb early abort handler

 *	  v4t_late	- ARMv4 with Thumb late abort handler

 *	  v4t_early	- ARMv4 with Thumb early abort handler

 *	  v5tej_early	- ARMv5 with Thumb and Java early abort handler

 *	  v5t_early	- ARMv5 with Thumb early abort handler

 *	  v5tj_early	- ARMv5 with Thumb and Java early abort handler

 *	  xscale	- ARMv5 with Thumb with Xscale extensions

 *	  v6_early	- ARMv6 generic early abort handler

 *	  v7_early	- ARMv7 generic early abort handler
@@ -39,19 +39,19 @@ 
# endif

#endif



#ifdef CONFIG_CPU_ABRT_LV4T

#ifdef CONFIG_CPU_ABRT_EV4

# ifdef CPU_DABORT_HANDLER

#  define MULTI_DABORT 1

# else

#  define CPU_DABORT_HANDLER v4t_late_abort

#  define CPU_DABORT_HANDLER v4_early_abort

# endif

#endif



#ifdef CONFIG_CPU_ABRT_EV4

#ifdef CONFIG_CPU_ABRT_LV4T

# ifdef CPU_DABORT_HANDLER

#  define MULTI_DABORT 1

# else

#  define CPU_DABORT_HANDLER v4_early_abort

#  define CPU_DABORT_HANDLER v4t_late_abort

# endif

#endif
@@ -63,19 +63,19 @@ 
# endif

#endif



#ifdef CONFIG_CPU_ABRT_EV5TJ

#ifdef CONFIG_CPU_ABRT_EV5T

# ifdef CPU_DABORT_HANDLER

#  define MULTI_DABORT 1

# else

#  define CPU_DABORT_HANDLER v5tj_early_abort

#  define CPU_DABORT_HANDLER v5t_early_abort

# endif

#endif



#ifdef CONFIG_CPU_ABRT_EV5T

#ifdef CONFIG_CPU_ABRT_EV5TJ

# ifdef CPU_DABORT_HANDLER

#  define MULTI_DABORT 1

# else

#  define CPU_DABORT_HANDLER v5t_early_abort

#  define CPU_DABORT_HANDLER v5tj_early_abort

# endif

#endif

arch/arm/kernel/head-common.S

+7 −2
Original line number Diff line number Diff line
@@ -98,8 +98,9 @@ __mmap_switched: 
	str	r9, [r4]			@ Save processor ID

	str	r1, [r5]			@ Save machine type

	str	r2, [r6]			@ Save atags pointer

	bic	r4, r0, #CR_A			@ Clear 'A' bit

	stmia	r7, {r0, r4}			@ Save control register values

	cmp	r7, #0

	bicne	r4, r0, #CR_A			@ Clear 'A' bit

	stmneia	r7, {r0, r4}			@ Save control register values

	b	start_kernel

ENDPROC(__mmap_switched)
@@ -113,7 +114,11 @@ __mmap_switched_data: 
	.long	processor_id			@ r4

	.long	__machine_arch_type		@ r5

	.long	__atags_pointer			@ r6

#ifdef CONFIG_CPU_CP15

	.long	cr_alignment			@ r7

#else

	.long	0				@ r7

#endif

	.long	init_thread_union + THREAD_START_SP @ sp

	.size	__mmap_switched_data, . - __mmap_switched_data