Unverified Commit 736b81e0 authored by Jon Lin's avatar Jon Lin Committed by Mark Brown
Browse files

spi: rockchip: Support SPI_CS_HIGH 



1.Add standard spi-cs-high support
2.Refer to spi-controller.yaml for details

Signed-off-by: default avatarJon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20210621104848.19539-2-jon.lin@rock-chips.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent b8d42371

drivers/spi/spi-rockchip.c

+13 −1
Original line number Diff line number Diff line
@@ -107,6 +107,8 @@ 
#define CR0_OPM_MASTER				0x0

#define CR0_OPM_SLAVE				0x1



#define CR0_SOI_OFFSET				23



#define CR0_MTM_OFFSET				0x21



/* Bit fields in SER, 2bit */
@@ -236,7 +238,7 @@ static void rockchip_spi_set_cs(struct spi_device *spi, bool enable) 
{

	struct spi_controller *ctlr = spi->controller;

	struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);

	bool cs_asserted = !enable;

	bool cs_asserted = spi->mode & SPI_CS_HIGH ? enable : !enable;



	/* Return immediately for no-op */

	if (cs_asserted == rs->cs_asserted[spi->chip_select])
@@ -507,6 +509,8 @@ static int rockchip_spi_config(struct rockchip_spi *rs, 
	cr0 |= (spi->mode & 0x3U) << CR0_SCPH_OFFSET;

	if (spi->mode & SPI_LSB_FIRST)

		cr0 |= CR0_FBM_LSB << CR0_FBM_OFFSET;

	if (spi->mode & SPI_CS_HIGH)

		cr0 |= BIT(spi->chip_select) << CR0_SOI_OFFSET;



	if (xfer->rx_buf && xfer->tx_buf)

		cr0 |= CR0_XFM_TR << CR0_XFM_OFFSET;
@@ -795,6 +799,14 @@ static int rockchip_spi_probe(struct platform_device *pdev) 
		ctlr->can_dma = rockchip_spi_can_dma;

	}



	switch (readl_relaxed(rs->regs + ROCKCHIP_SPI_VERSION)) {

	case ROCKCHIP_SPI_VER2_TYPE2:

		ctlr->mode_bits |= SPI_CS_HIGH;

		break;

	default:

		break;

	}



	ret = devm_spi_register_controller(&pdev->dev, ctlr);

	if (ret < 0) {

		dev_err(&pdev->dev, "Failed to register controller\n");