Loading arch/sparc/Kconfig +1 −1 Original line number Diff line number Diff line Loading @@ -176,7 +176,7 @@ config SMP Management" code will be disabled if you say Y here. See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO available at <http://www.tldp.org/docs.html#howto>. available at <https://www.tldp.org/docs.html#howto>. If you don't know what to do here, say N. Loading arch/sparc/boot/piggyback.c +4 −0 Original line number Diff line number Diff line Loading @@ -154,6 +154,10 @@ static off_t get_hdrs_offset(int kernelfd, const char *filename) offset -= LOOKBACK; /* skip a.out header */ offset += AOUT_TEXT_OFFSET; if (offset < 0) { errno = -EINVAL; die("Calculated a negative offset, probably elftoaout generated an invalid image. Did you use a recent elftoaout ?"); } if (lseek(kernelfd, offset, SEEK_SET) < 0) die("lseek"); if (read(kernelfd, buffer, BUFSIZE) != BUFSIZE) Loading arch/sparc/include/asm/backoff.h +1 −1 Original line number Diff line number Diff line Loading @@ -18,7 +18,7 @@ * * When we spin, we try to use an operation that will cause the * current cpu strand to block, and therefore make the core fully * available to any other other runnable strands. There are two * available to any other runnable strands. There are two * options, based upon cpu capabilities. * * On all cpus prior to SPARC-T4 we do three dummy reads of the Loading arch/sparc/include/asm/pgtsrmmu.h +1 −1 Original line number Diff line number Diff line Loading @@ -113,7 +113,7 @@ extern unsigned long last_valid_pfn; extern void *srmmu_nocache_pool; #define __nocache_pa(VADDR) (((unsigned long)VADDR) - SRMMU_NOCACHE_VADDR + __pa((unsigned long)srmmu_nocache_pool)) #define __nocache_va(PADDR) (__va((unsigned long)PADDR) - (unsigned long)srmmu_nocache_pool + SRMMU_NOCACHE_VADDR) #define __nocache_fix(VADDR) __va(__nocache_pa(VADDR)) #define __nocache_fix(VADDR) ((__typeof__(VADDR))__va(__nocache_pa(VADDR))) /* Accessing the MMU control register. */ unsigned int srmmu_get_mmureg(void); Loading arch/sparc/kernel/pci.c +1 −2 Original line number Diff line number Diff line Loading @@ -552,9 +552,8 @@ static void pci_of_scan_bus(struct pci_pbm_info *pbm, pci_info(bus, "scan_bus[%pOF] bus no %d\n", node, bus->number); child = NULL; prev_devfn = -1; while ((child = of_get_next_child(node, child)) != NULL) { for_each_child_of_node(node, child) { if (ofpci_verbose) pci_info(bus, " * %pOF\n", child); reg = of_get_property(child, "reg", ®len); Loading Loading
arch/sparc/Kconfig +1 −1 Original line number Diff line number Diff line Loading @@ -176,7 +176,7 @@ config SMP Management" code will be disabled if you say Y here. See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO available at <http://www.tldp.org/docs.html#howto>. available at <https://www.tldp.org/docs.html#howto>. If you don't know what to do here, say N. Loading
arch/sparc/boot/piggyback.c +4 −0 Original line number Diff line number Diff line Loading @@ -154,6 +154,10 @@ static off_t get_hdrs_offset(int kernelfd, const char *filename) offset -= LOOKBACK; /* skip a.out header */ offset += AOUT_TEXT_OFFSET; if (offset < 0) { errno = -EINVAL; die("Calculated a negative offset, probably elftoaout generated an invalid image. Did you use a recent elftoaout ?"); } if (lseek(kernelfd, offset, SEEK_SET) < 0) die("lseek"); if (read(kernelfd, buffer, BUFSIZE) != BUFSIZE) Loading
arch/sparc/include/asm/backoff.h +1 −1 Original line number Diff line number Diff line Loading @@ -18,7 +18,7 @@ * * When we spin, we try to use an operation that will cause the * current cpu strand to block, and therefore make the core fully * available to any other other runnable strands. There are two * available to any other runnable strands. There are two * options, based upon cpu capabilities. * * On all cpus prior to SPARC-T4 we do three dummy reads of the Loading
arch/sparc/include/asm/pgtsrmmu.h +1 −1 Original line number Diff line number Diff line Loading @@ -113,7 +113,7 @@ extern unsigned long last_valid_pfn; extern void *srmmu_nocache_pool; #define __nocache_pa(VADDR) (((unsigned long)VADDR) - SRMMU_NOCACHE_VADDR + __pa((unsigned long)srmmu_nocache_pool)) #define __nocache_va(PADDR) (__va((unsigned long)PADDR) - (unsigned long)srmmu_nocache_pool + SRMMU_NOCACHE_VADDR) #define __nocache_fix(VADDR) __va(__nocache_pa(VADDR)) #define __nocache_fix(VADDR) ((__typeof__(VADDR))__va(__nocache_pa(VADDR))) /* Accessing the MMU control register. */ unsigned int srmmu_get_mmureg(void); Loading
arch/sparc/kernel/pci.c +1 −2 Original line number Diff line number Diff line Loading @@ -552,9 +552,8 @@ static void pci_of_scan_bus(struct pci_pbm_info *pbm, pci_info(bus, "scan_bus[%pOF] bus no %d\n", node, bus->number); child = NULL; prev_devfn = -1; while ((child = of_get_next_child(node, child)) != NULL) { for_each_child_of_node(node, child) { if (ofpci_verbose) pci_info(bus, " * %pOF\n", child); reg = of_get_property(child, "reg", ®len); Loading