Commit 73421f2a authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

clk: renesas: r8a779f0: Add PFC clock 



Add the module clock used by the Pin Function (PFC/GPIO) controller
on the Renesas R-Car S4-8 (R8A779F0) SoC.

Extracted from a larger patch in the BSP by LUU HOAI.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: default avatarYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/4ef3d3dfe714ad75112e4886efea0b66e40a33bc.1645457502.git.geert+renesas@glider.be
parent 5447d32c

drivers/clk/renesas/r8a779f0-cpg-mssr.c

+1 −0
Original line number Diff line number Diff line
@@ -128,6 +128,7 @@ static const struct mssr_mod_clk r8a779f0_mod_clks[] __initconst = { 
	DEF_MOD("sys-dmac0",	709,	R8A779F0_CLK_S0D3_PER),

	DEF_MOD("sys-dmac1",	710,	R8A779F0_CLK_S0D3_PER),

	DEF_MOD("wdt",		907,	R8A779F0_CLK_R),

	DEF_MOD("pfc0",		915,	R8A779F0_CLK_CL16M),

};



static const unsigned int r8a779f0_crit_mod_clks[] __initconst = {