Commit 73076790 authored by Sung Lee's avatar Sung Lee Committed by Alex Deucher
Browse files

drm/amd/display: Copy over soc values before bounding box creation 

[Why]
With certain fclock overclocks, state 1 may be chosen
as the closest clock level. This may result in this state
being empty if not populated beforehand, resulting in
black screens and screen corruption.

[How]
Copy over all soc states to clock_limits before bounding
box creation to avoid any cases with empty states.

Fixes: f2459c52 ("drm/amd/display: Add Bounding Box State for Low DF PState but High Voltage State")
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1514


Signed-off-by: default avatarSung Lee <sung.lee@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Reviewed-by: default avatarYongqiang Sun <yongqiang.sun@amd.com>
Acked-by: default avatarQingqing Zhuo <Qingqing.Zhuo@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
parent 4042160c

drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c

+5 −0
Original line number Diff line number Diff line
@@ -1595,6 +1595,11 @@ static void update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_param 
	dcn2_1_soc.num_chans = bw_params->num_channels;



	ASSERT(clk_table->num_entries);

	/* Copy dcn2_1_soc.clock_limits to clock_limits to avoid copying over null states later */

	for (i = 0; i < dcn2_1_soc.num_states + 1; i++) {

		clock_limits[i] = dcn2_1_soc.clock_limits[i];

	}



	for (i = 0; i < clk_table->num_entries; i++) {

		/* loop backwards*/

		for (closest_clk_lvl = 0, j = dcn2_1_soc.num_states - 1; j >= 0; j--) {