Commit 72a7cf0a authored by Mario Kleiner's avatar Mario Kleiner Committed by Alex Deucher
Browse files

drm/amd/display: Keep linebuffer pixel depth at 30bpp for DCE-11.0. 



Testing on AMD Carizzo with DCE-11.0 display engine showed that
it doesn't like a 36 bpp linebuffer very much. The display just
showed a solid green.

Testing on RavenRidge DCN-1.0, Polaris11 with DCE-11.2 and Kabini
with DCE-8.3 did not expose any problems, so for now only revert
to 30 bpp linebuffer depth on asics with DCE-11.0 display engine.

Fixes: a316db72 ("drm/amd/display: Increase linebuffer pixel depth to 36bpp.")
Reported-by: default avatarTom StDenis <Tom.StDenis@amd.com>
Reviewed-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarMario Kleiner <mario.kleiner.de@gmail.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c45d9400

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

+9 −2
Original line number Diff line number Diff line
@@ -1042,9 +1042,16 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx) 
	 * on certain displays, such as the Sharp 4k. 36bpp is needed

	 * to support SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616 and

	 * SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616 with actual > 10 bpc

	 * precision on at least DCN display engines.

	 * precision on at least DCN display engines. However, at least

	 * Carrizo with DCE_VERSION_11_0 does not like 36 bpp lb depth,

	 * so use only 30 bpp on DCE_VERSION_11_0. Testing with DCE 11.2 and 8.3

	 * did not show such problems, so this seems to be the exception.

	 */

	if (plane_state->ctx->dce_version != DCE_VERSION_11_0)

		pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_36BPP;

	else

		pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_30BPP;



	pipe_ctx->plane_res.scl_data.lb_params.alpha_en = plane_state->per_pixel_alpha;



	if (pipe_ctx->plane_res.xfm != NULL)