Commit 728776d7 authored by Kunihiko Hayashi's avatar Kunihiko Hayashi Committed by Vinod Koul
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dt-bindings: phy: Add UniPhier AHCI PHY description 



Add DT bindings for PHY interface built into ahci controller implemented
in UniPhier SoCs.

Signed-off-by: default avatarKunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1598352071-26675-2-git-send-email-hayashi.kunihiko@socionext.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 23bea1be

Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/phy/socionext,uniphier-ahci-phy.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Socionext UniPhier AHCI PHY



description: |

  This describes the deivcetree bindings for PHY interfaces built into

  AHCI controller implemented on Socionext UniPhier SoCs.



maintainers:

  - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>



properties:

  compatible:

    enum:

      - socionext,uniphier-pxs2-ahci-phy

      - socionext,uniphier-pxs3-ahci-phy



  reg:

    description: PHY register region (offset and length)



  "#phy-cells":

    const: 0



  clocks:

    maxItems: 2



  clock-names:

    oneOf:

      - items:          # for PXs2

        - const: link

      - items:          # for others

        - const: link

        - const: phy



  resets:

    maxItems: 2



  reset-names:

    items:

      - const: link

      - const: phy



required:

  - compatible

  - reg

  - "#phy-cells"

  - clocks

  - clock-names

  - resets

  - reset-names



additionalProperties: false



examples:

  - |

    ahci-glue@65700000 {

        compatible = "socionext,uniphier-pxs3-ahci-glue",

                     "simple-mfd";

        #address-cells = <1>;

        #size-cells = <1>;

        ranges = <0 0x65700000 0x100>;



        ahci_phy: phy@10 {

            compatible = "socionext,uniphier-pxs3-ahci-phy";

            reg = <0x10 0x10>;

            #phy-cells = <0>;

            clock-names = "link", "phy";

            clocks = <&sys_clk 28>, <&sys_clk 30>;

            reset-names = "link", "phy";

            resets = <&sys_rst 28>, <&sys_rst 30>;

        };

    };