Commit 72783d65 authored by Peng Fan's avatar Peng Fan Committed by Shawn Guo
Browse files

arm64: dts: imx8mq-librem5: update pinctrl to match dtschema 



The dtschema requires 'grp' in the end, so update the name.

Signed-off-by: default avatarPeng Fan <peng.fan@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 523306b6

arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts

+1 −1
Original line number Diff line number Diff line
@@ -667,7 +667,7 @@ 
		>;

	};



	pinctrl_spkamp: spkamp {

	pinctrl_spkamp: spkampgrp {

		fsl,pins = <

			MX8MQ_IOMUXC_SPDIF_TX_GPIO5_IO3		0x81  /* MUTE */

		>;

arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -686,7 +686,7 @@ 
		>;

	};



	pinctrl_usdhc1_100mhz: usdhc1grp100mhz {

	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {

		fsl,pins = <

			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x8d

			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xcd
@@ -703,7 +703,7 @@ 
		>;

	};



	pinctrl_usdhc1_200mhz: usdhc1grp200mhz {

	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {

		fsl,pins = <

			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x9f

			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xdf
@@ -733,7 +733,7 @@ 
		>;

	};



	pinctrl_usdhc2_100mhz: usdhc2grp100mhz {

	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {

		fsl,pins = <

			MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12	0x80

			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x8d
@@ -746,7 +746,7 @@ 
		>;

	};



	pinctrl_usdhc2_200mhz: usdhc2grp200mhz {

	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {

		fsl,pins = <

			MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12	0x80

			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x9f