Unverified Commit 7265e8fc authored by Mark Brown's avatar Mark Brown
Browse files

Merge branch 'spi-5.5' into spi-linus

parents def9d278 29d7e05c

drivers/spi/spi-dw.c

+3 −0
Original line number Diff line number Diff line
@@ -297,6 +297,9 @@ static int dw_spi_transfer_one(struct spi_controller *master, 
	dws->len = transfer->len;

	spin_unlock_irqrestore(&dws->buf_lock, flags);



	/* Ensure dw->rx and dw->rx_end are visible */

	smp_mb();



	spi_enable_chip(dws, 0);



	/* Handle per transfer options for bpw and speed */

drivers/spi/spi-fsl-qspi.c

+1 −1
Original line number Diff line number Diff line
@@ -410,7 +410,7 @@ static bool fsl_qspi_supports_op(struct spi_mem *mem, 
	    op->data.nbytes > q->devtype_data->txfifo)

		return false;



	return true;

	return spi_mem_default_supports_op(mem, op);

}



static void fsl_qspi_prepare_lut(struct fsl_qspi *q,

drivers/spi/spi-npcm-pspi.c

+9 −8
Original line number Diff line number Diff line
@@ -195,6 +195,7 @@ static void npcm_pspi_setup_transfer(struct spi_device *spi, 
static void npcm_pspi_send(struct npcm_pspi *priv)

{

	int wsize;

	u16 val;



	wsize = min(bytes_per_word(priv->bits_per_word), priv->tx_bytes);

	priv->tx_bytes -= wsize;
@@ -204,17 +205,18 @@ static void npcm_pspi_send(struct npcm_pspi *priv) 


	switch (wsize) {

	case 1:

		iowrite8(*priv->tx_buf, NPCM_PSPI_DATA + priv->base);

		val = *priv->tx_buf++;

		iowrite8(val, NPCM_PSPI_DATA + priv->base);

		break;

	case 2:

		iowrite16(*priv->tx_buf, NPCM_PSPI_DATA + priv->base);

		val = *priv->tx_buf++;

		val = *priv->tx_buf++ | (val << 8);

		iowrite16(val, NPCM_PSPI_DATA + priv->base);

		break;

	default:

		WARN_ON_ONCE(1);

		return;

	}



	priv->tx_buf += wsize;

}



static void npcm_pspi_recv(struct npcm_pspi *priv)
@@ -230,18 +232,17 @@ static void npcm_pspi_recv(struct npcm_pspi *priv) 


	switch (rsize) {

	case 1:

		val = ioread8(priv->base + NPCM_PSPI_DATA);

		*priv->rx_buf++ = ioread8(priv->base + NPCM_PSPI_DATA);

		break;

	case 2:

		val = ioread16(priv->base + NPCM_PSPI_DATA);

		*priv->rx_buf++ = (val >> 8);

		*priv->rx_buf++ = val & 0xff;

		break;

	default:

		WARN_ON_ONCE(1);

		return;

	}



	*priv->rx_buf = val;

	priv->rx_buf += rsize;

}



static int npcm_pspi_transfer_one(struct spi_master *master,

drivers/spi/spi-pxa2xx.c

+20 −11
Original line number Diff line number Diff line
@@ -461,6 +461,16 @@ int pxa2xx_spi_flush(struct driver_data *drv_data) 
	return limit;

}



static void pxa2xx_spi_off(struct driver_data *drv_data)

{

	/* On MMP, disabling SSE seems to corrupt the rx fifo */

	if (drv_data->ssp_type == MMP2_SSP)

		return;



	pxa2xx_spi_write(drv_data, SSCR0,

			 pxa2xx_spi_read(drv_data, SSCR0) & ~SSCR0_SSE);

}



static int null_writer(struct driver_data *drv_data)

{

	u8 n_bytes = drv_data->n_bytes;
@@ -587,8 +597,7 @@ static void int_error_stop(struct driver_data *drv_data, const char* msg) 
	if (!pxa25x_ssp_comp(drv_data))

		pxa2xx_spi_write(drv_data, SSTO, 0);

	pxa2xx_spi_flush(drv_data);

	pxa2xx_spi_write(drv_data, SSCR0,

			 pxa2xx_spi_read(drv_data, SSCR0) & ~SSCR0_SSE);

	pxa2xx_spi_off(drv_data);



	dev_err(&drv_data->pdev->dev, "%s\n", msg);
@@ -686,8 +695,7 @@ static irqreturn_t interrupt_transfer(struct driver_data *drv_data) 


static void handle_bad_msg(struct driver_data *drv_data)

{

	pxa2xx_spi_write(drv_data, SSCR0,

			 pxa2xx_spi_read(drv_data, SSCR0) & ~SSCR0_SSE);

	pxa2xx_spi_off(drv_data);

	pxa2xx_spi_write(drv_data, SSCR1,

			 pxa2xx_spi_read(drv_data, SSCR1) & ~drv_data->int_cr1);

	if (!pxa25x_ssp_comp(drv_data))
@@ -1062,6 +1070,7 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *controller, 
	    || (pxa2xx_spi_read(drv_data, SSCR1) & change_mask)

	    != (cr1 & change_mask)) {

		/* stop the SSP, and update the other bits */

		if (drv_data->ssp_type != MMP2_SSP)

			pxa2xx_spi_write(drv_data, SSCR0, cr0 & ~SSCR0_SSE);

		if (!pxa25x_ssp_comp(drv_data))

			pxa2xx_spi_write(drv_data, SSTO, chip->timeout);
@@ -1118,8 +1127,7 @@ static int pxa2xx_spi_slave_abort(struct spi_controller *controller) 
	if (!pxa25x_ssp_comp(drv_data))

		pxa2xx_spi_write(drv_data, SSTO, 0);

	pxa2xx_spi_flush(drv_data);

	pxa2xx_spi_write(drv_data, SSCR0,

			 pxa2xx_spi_read(drv_data, SSCR0) & ~SSCR0_SSE);

	pxa2xx_spi_off(drv_data);



	dev_dbg(&drv_data->pdev->dev, "transfer aborted\n");
@@ -1135,8 +1143,7 @@ static void pxa2xx_spi_handle_err(struct spi_controller *controller, 
	struct driver_data *drv_data = spi_controller_get_devdata(controller);



	/* Disable the SSP */

	pxa2xx_spi_write(drv_data, SSCR0,

			 pxa2xx_spi_read(drv_data, SSCR0) & ~SSCR0_SSE);

	pxa2xx_spi_off(drv_data);

	/* Clear and disable interrupts and service requests */

	write_SSSR_CS(drv_data, drv_data->clear_sr);

	pxa2xx_spi_write(drv_data, SSCR1,
@@ -1161,8 +1168,7 @@ static int pxa2xx_spi_unprepare_transfer(struct spi_controller *controller) 
	struct driver_data *drv_data = spi_controller_get_devdata(controller);



	/* Disable the SSP now */

	pxa2xx_spi_write(drv_data, SSCR0,

			 pxa2xx_spi_read(drv_data, SSCR0) & ~SSCR0_SSE);

	pxa2xx_spi_off(drv_data);



	return 0;

}
@@ -1423,6 +1429,9 @@ static const struct pci_device_id pxa2xx_spi_pci_compound_match[] = { 
	/* KBL-H */

	{ PCI_VDEVICE(INTEL, 0xa2a9), LPSS_SPT_SSP },

	{ PCI_VDEVICE(INTEL, 0xa2aa), LPSS_SPT_SSP },

	/* CML-V */

	{ PCI_VDEVICE(INTEL, 0xa3a9), LPSS_SPT_SSP },

	{ PCI_VDEVICE(INTEL, 0xa3aa), LPSS_SPT_SSP },

	/* BXT A-Step */

	{ PCI_VDEVICE(INTEL, 0x0ac2), LPSS_BXT_SSP },

	{ PCI_VDEVICE(INTEL, 0x0ac4), LPSS_BXT_SSP },