Commit 7243867c authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Nuke intel_bw_calc_min_cdclk() 



intel_bw_calc_min_cdclk() is entirely pointless. All it manages to do is
somehow conflate the per-pipe min cdclk with dbuf min cdclk. There is no
(at least documented) dbuf min cdclk limit on pre-skl so let's just get
rid of all this confusion.

Reviewed-by: default avatarStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220303191207.27931-6-ville.syrjala@linux.intel.com
parent 0d21fd10

drivers/gpu/drm/i915/display/intel_bw.c

+4 −45
Original line number Diff line number Diff line
@@ -717,7 +717,7 @@ static void skl_crtc_calc_dbuf_bw(struct intel_bw_state *bw_state, 
	}

}



int skl_bw_calc_min_cdclk(struct intel_atomic_state *state)

int intel_bw_calc_min_cdclk(struct intel_atomic_state *state)

{

	struct drm_i915_private *dev_priv = to_i915(state->base.dev);

	struct intel_bw_state *new_bw_state = NULL;
@@ -728,6 +728,9 @@ int skl_bw_calc_min_cdclk(struct intel_atomic_state *state) 
	enum pipe pipe;

	int i;



	if (DISPLAY_VER(dev_priv) < 9)

		return 0;



	for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {

		new_bw_state = intel_atomic_get_bw_state(state);

		if (IS_ERR(new_bw_state))
@@ -772,50 +775,6 @@ int skl_bw_calc_min_cdclk(struct intel_atomic_state *state) 
	return 0;

}



int intel_bw_calc_min_cdclk(struct intel_atomic_state *state)

{

	struct drm_i915_private *dev_priv = to_i915(state->base.dev);

	struct intel_bw_state *new_bw_state = NULL;

	struct intel_bw_state *old_bw_state = NULL;

	const struct intel_crtc_state *crtc_state;

	struct intel_crtc *crtc;

	int min_cdclk = 0;

	enum pipe pipe;

	int i;



	for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {

		new_bw_state = intel_atomic_get_bw_state(state);

		if (IS_ERR(new_bw_state))

			return PTR_ERR(new_bw_state);



		old_bw_state = intel_atomic_get_old_bw_state(state);

	}



	if (!old_bw_state)

		return 0;



	for_each_pipe(dev_priv, pipe) {

		struct intel_cdclk_state *cdclk_state;



		cdclk_state = intel_atomic_get_new_cdclk_state(state);

		if (!cdclk_state)

			return 0;



		min_cdclk = max(cdclk_state->min_cdclk[pipe], min_cdclk);

	}



	new_bw_state->min_cdclk = min_cdclk;



	if (new_bw_state->min_cdclk != old_bw_state->min_cdclk) {

		int ret = intel_atomic_lock_global_state(&new_bw_state->base);



		if (ret)

			return ret;

	}



	return 0;

}



static u16 icl_qgv_points_mask(struct drm_i915_private *i915)

{

	unsigned int num_psf_gv_points = i915->max_bw[0].num_psf_gv_points;

drivers/gpu/drm/i915/display/intel_bw.h

+0 −1
Original line number Diff line number Diff line
@@ -65,6 +65,5 @@ void intel_bw_crtc_update(struct intel_bw_state *bw_state, 
int icl_pcode_restrict_qgv_points(struct drm_i915_private *dev_priv,

				  u32 points_mask);

int intel_bw_calc_min_cdclk(struct intel_atomic_state *state);

int skl_bw_calc_min_cdclk(struct intel_atomic_state *state);



#endif /* __INTEL_BW_H__ */

drivers/gpu/drm/i915/display/intel_cdclk.c

+1 −30
Original line number Diff line number Diff line
@@ -72,7 +72,6 @@ struct intel_cdclk_funcs { 
	void (*set_cdclk)(struct drm_i915_private *i915,

			  const struct intel_cdclk_config *cdclk_config,

			  enum pipe pipe);

	int (*bw_calc_min_cdclk)(struct intel_atomic_state *state);

	int (*modeset_calc_cdclk)(struct intel_cdclk_state *state);

	u8 (*calc_voltage_level)(int cdclk);

};
@@ -83,12 +82,6 @@ void intel_cdclk_get_cdclk(struct drm_i915_private *dev_priv, 
	dev_priv->cdclk_funcs->get_cdclk(dev_priv, cdclk_config);

}



static int intel_cdclk_bw_calc_min_cdclk(struct intel_atomic_state *state)

{

	struct drm_i915_private *dev_priv = to_i915(state->base.dev);

	return dev_priv->cdclk_funcs->bw_calc_min_cdclk(state);

}



static void intel_cdclk_set_cdclk(struct drm_i915_private *dev_priv,

				  const struct intel_cdclk_config *cdclk_config,

				  enum pipe pipe)
@@ -2683,7 +2676,7 @@ int intel_cdclk_atomic_check(struct intel_atomic_state *state, 
	    old_cdclk_state->force_min_cdclk != new_cdclk_state->force_min_cdclk)

		*need_cdclk_calc = true;



	ret = intel_cdclk_bw_calc_min_cdclk(state);

	ret = intel_bw_calc_min_cdclk(state);

	if (ret)

		return ret;
@@ -3072,7 +3065,6 @@ u32 intel_read_rawclk(struct drm_i915_private *dev_priv) 
static const struct intel_cdclk_funcs tgl_cdclk_funcs = {

	.get_cdclk = bxt_get_cdclk,

	.set_cdclk = bxt_set_cdclk,

	.bw_calc_min_cdclk = skl_bw_calc_min_cdclk,

	.modeset_calc_cdclk = bxt_modeset_calc_cdclk,

	.calc_voltage_level = tgl_calc_voltage_level,

};
@@ -3080,7 +3072,6 @@ static const struct intel_cdclk_funcs tgl_cdclk_funcs = { 
static const struct intel_cdclk_funcs ehl_cdclk_funcs = {

	.get_cdclk = bxt_get_cdclk,

	.set_cdclk = bxt_set_cdclk,

	.bw_calc_min_cdclk = skl_bw_calc_min_cdclk,

	.modeset_calc_cdclk = bxt_modeset_calc_cdclk,

	.calc_voltage_level = ehl_calc_voltage_level,

};
@@ -3088,7 +3079,6 @@ static const struct intel_cdclk_funcs ehl_cdclk_funcs = { 
static const struct intel_cdclk_funcs icl_cdclk_funcs = {

	.get_cdclk = bxt_get_cdclk,

	.set_cdclk = bxt_set_cdclk,

	.bw_calc_min_cdclk = skl_bw_calc_min_cdclk,

	.modeset_calc_cdclk = bxt_modeset_calc_cdclk,

	.calc_voltage_level = icl_calc_voltage_level,

};
@@ -3096,7 +3086,6 @@ static const struct intel_cdclk_funcs icl_cdclk_funcs = { 
static const struct intel_cdclk_funcs bxt_cdclk_funcs = {

	.get_cdclk = bxt_get_cdclk,

	.set_cdclk = bxt_set_cdclk,

	.bw_calc_min_cdclk = skl_bw_calc_min_cdclk,

	.modeset_calc_cdclk = bxt_modeset_calc_cdclk,

	.calc_voltage_level = bxt_calc_voltage_level,

};
@@ -3104,53 +3093,45 @@ static const struct intel_cdclk_funcs bxt_cdclk_funcs = { 
static const struct intel_cdclk_funcs skl_cdclk_funcs = {

	.get_cdclk = skl_get_cdclk,

	.set_cdclk = skl_set_cdclk,

	.bw_calc_min_cdclk = skl_bw_calc_min_cdclk,

	.modeset_calc_cdclk = skl_modeset_calc_cdclk,

};



static const struct intel_cdclk_funcs bdw_cdclk_funcs = {

	.get_cdclk = bdw_get_cdclk,

	.set_cdclk = bdw_set_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = bdw_modeset_calc_cdclk,

};



static const struct intel_cdclk_funcs chv_cdclk_funcs = {

	.get_cdclk = vlv_get_cdclk,

	.set_cdclk = chv_set_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = vlv_modeset_calc_cdclk,

};



static const struct intel_cdclk_funcs vlv_cdclk_funcs = {

	.get_cdclk = vlv_get_cdclk,

	.set_cdclk = vlv_set_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = vlv_modeset_calc_cdclk,

};



static const struct intel_cdclk_funcs hsw_cdclk_funcs = {

	.get_cdclk = hsw_get_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = fixed_modeset_calc_cdclk,

};



/* SNB, IVB, 965G, 945G */

static const struct intel_cdclk_funcs fixed_400mhz_cdclk_funcs = {

	.get_cdclk = fixed_400mhz_get_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = fixed_modeset_calc_cdclk,

};



static const struct intel_cdclk_funcs ilk_cdclk_funcs = {

	.get_cdclk = fixed_450mhz_get_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = fixed_modeset_calc_cdclk,

};



static const struct intel_cdclk_funcs gm45_cdclk_funcs = {

	.get_cdclk = gm45_get_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = fixed_modeset_calc_cdclk,

};
@@ -3158,7 +3139,6 @@ static const struct intel_cdclk_funcs gm45_cdclk_funcs = { 


static const struct intel_cdclk_funcs i965gm_cdclk_funcs = {

	.get_cdclk = i965gm_get_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = fixed_modeset_calc_cdclk,

};
@@ -3166,19 +3146,16 @@ static const struct intel_cdclk_funcs i965gm_cdclk_funcs = { 


static const struct intel_cdclk_funcs pnv_cdclk_funcs = {

	.get_cdclk = pnv_get_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = fixed_modeset_calc_cdclk,

};



static const struct intel_cdclk_funcs g33_cdclk_funcs = {

	.get_cdclk = g33_get_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = fixed_modeset_calc_cdclk,

};



static const struct intel_cdclk_funcs i945gm_cdclk_funcs = {

	.get_cdclk = i945gm_get_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = fixed_modeset_calc_cdclk,

};
@@ -3186,37 +3163,31 @@ static const struct intel_cdclk_funcs i945gm_cdclk_funcs = { 


static const struct intel_cdclk_funcs i915gm_cdclk_funcs = {

	.get_cdclk = i915gm_get_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = fixed_modeset_calc_cdclk,

};



static const struct intel_cdclk_funcs i915g_cdclk_funcs = {

	.get_cdclk = fixed_333mhz_get_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = fixed_modeset_calc_cdclk,

};



static const struct intel_cdclk_funcs i865g_cdclk_funcs = {

	.get_cdclk = fixed_266mhz_get_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = fixed_modeset_calc_cdclk,

};



static const struct intel_cdclk_funcs i85x_cdclk_funcs = {

	.get_cdclk = i85x_get_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = fixed_modeset_calc_cdclk,

};



static const struct intel_cdclk_funcs i845g_cdclk_funcs = {

	.get_cdclk = fixed_200mhz_get_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = fixed_modeset_calc_cdclk,

};



static const struct intel_cdclk_funcs i830_cdclk_funcs = {

	.get_cdclk = fixed_133mhz_get_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = fixed_modeset_calc_cdclk,

};