Commit 72271420 authored by Sergio Paracuellos's avatar Sergio Paracuellos Committed by Rob Herring
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dt-bindings: interrupt-controller: migrate MIPS CPU interrupt controller text bindings to YAML



MIPS CPU interrupt controller bindings used text format, so migrate them
to YAML.

Signed-off-by: default avatarSergio Paracuellos <sergio.paracuellos@gmail.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220921072405.610739-1-sergio.paracuellos@gmail.com


Signed-off-by: default avatarRob Herring <robh@kernel.org>
parent e7c21940
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/mti,cpu-interrupt-controller.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: MIPS CPU Interrupt Controller

description: >
   On MIPS the mips_cpu_irq_of_init() helper can be used to initialize the 8 CPU
   IRQs from a devicetree file and create a irq_domain for IRQ controller.

   With the irq_domain in place we can describe how the 8 IRQs are wired to the
   platforms internal interrupt controller cascade.

maintainers:
  - Thomas Bogendoerfer <tsbogend@alpha.franken.de>

properties:
  compatible:
    const: mti,cpu-interrupt-controller

  '#interrupt-cells':
    const: 1

  '#address-cells':
    const: 0

  interrupt-controller: true

additionalProperties: false

required:
  - compatible
  - '#interrupt-cells'
  - '#address-cells'
  - interrupt-controller

examples:
  - |
    interrupt-controller {
      compatible = "mti,cpu-interrupt-controller";
      #address-cells = <0>;
      #interrupt-cells = <1>;
      interrupt-controller;
    };
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MIPS CPU interrupt controller

On MIPS the mips_cpu_irq_of_init() helper can be used to initialize the 8 CPU
IRQs from a devicetree file and create a irq_domain for IRQ controller.

With the irq_domain in place we can describe how the 8 IRQs are wired to the
platforms internal interrupt controller cascade.

Below is an example of a platform describing the cascade inside the devicetree
and the code used to load it inside arch_init_irq().

Required properties:
- compatible : Should be "mti,cpu-interrupt-controller"

Example devicetree:
	cpu-irq: cpu-irq {
		#address-cells = <0>;

		interrupt-controller;
		#interrupt-cells = <1>;

		compatible = "mti,cpu-interrupt-controller";
	};

	intc: intc@200 {
		compatible = "ralink,rt2880-intc";
		reg = <0x200 0x100>;

		interrupt-controller;
		#interrupt-cells = <1>;

		interrupt-parent = <&cpu-irq>;
		interrupts = <2>;
	};


Example platform irq.c:
static struct of_device_id __initdata of_irq_ids[] = {
	{ .compatible = "mti,cpu-interrupt-controller", .data = mips_cpu_irq_of_init },
	{ .compatible = "ralink,rt2880-intc", .data = intc_of_init },
	{},
};

void __init arch_init_irq(void)
{
	of_irq_init(of_irq_ids);
}