Commit 7200095f authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull arm64 fixes from Will Deacon:
 "There's no real pattern to the fixes, but the main one fixes our
  pmd_leaf() definition to resolve a NULL dereference on the migration
  path.

   - Fix PMU event validation in the absence of any event counters

   - Fix allmodconfig build using clang in conjunction with binutils

   - Fix definitions of pXd_leaf() to handle PROT_NONE entries

   - More typo fixes"

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: mm: fix p?d_leaf()
  arm64: fix typos in comments
  arm64: Improve HAVE_DYNAMIC_FTRACE_WITH_REGS selection for clang
  arm_pmu: Validate single/group leader events
parents 22f19f67 23bc8f69
Loading
Loading
Loading
Loading
+12 −3
Original line number Diff line number Diff line
@@ -175,8 +175,6 @@ config ARM64
	select HAVE_DEBUG_KMEMLEAK
	select HAVE_DMA_CONTIGUOUS
	select HAVE_DYNAMIC_FTRACE
	select HAVE_DYNAMIC_FTRACE_WITH_REGS \
		if $(cc-option,-fpatchable-function-entry=2)
	select FTRACE_MCOUNT_USE_PATCHABLE_FUNCTION_ENTRY \
		if DYNAMIC_FTRACE_WITH_REGS
	select HAVE_EFFICIENT_UNALIGNED_ACCESS
@@ -228,6 +226,17 @@ config ARM64
	help
	  ARM 64-bit (AArch64) Linux support.

config CLANG_SUPPORTS_DYNAMIC_FTRACE_WITH_REGS
	def_bool CC_IS_CLANG
	# https://github.com/ClangBuiltLinux/linux/issues/1507
	depends on AS_IS_GNU || (AS_IS_LLVM && (LD_IS_LLD || LD_VERSION >= 23600))
	select HAVE_DYNAMIC_FTRACE_WITH_REGS

config GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_REGS
	def_bool CC_IS_GCC
	depends on $(cc-option,-fpatchable-function-entry=2)
	select HAVE_DYNAMIC_FTRACE_WITH_REGS

config 64BIT
	def_bool y

@@ -678,7 +687,7 @@ config ARM64_ERRATUM_2051678
	default y
	help
	  This options adds the workaround for ARM Cortex-A510 erratum ARM64_ERRATUM_2051678.
	  Affected Coretex-A510 might not respect the ordering rules for
	  Affected Cortex-A510 might not respect the ordering rules for
	  hardware update of the page table's dirty bit. The workaround
	  is to not enable the feature on affected CPUs.

+2 −2
Original line number Diff line number Diff line
@@ -535,7 +535,7 @@ extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
				 PMD_TYPE_TABLE)
#define pmd_sect(pmd)		((pmd_val(pmd) & PMD_TYPE_MASK) == \
				 PMD_TYPE_SECT)
#define pmd_leaf(pmd)		pmd_sect(pmd)
#define pmd_leaf(pmd)		(pmd_present(pmd) && !pmd_table(pmd))
#define pmd_bad(pmd)		(!pmd_table(pmd))

#define pmd_leaf_size(pmd)	(pmd_cont(pmd) ? CONT_PMD_SIZE : PMD_SIZE)
@@ -625,7 +625,7 @@ static inline unsigned long pmd_page_vaddr(pmd_t pmd)
#define pud_none(pud)		(!pud_val(pud))
#define pud_bad(pud)		(!pud_table(pud))
#define pud_present(pud)	pte_present(pud_pte(pud))
#define pud_leaf(pud)		pud_sect(pud)
#define pud_leaf(pud)		(pud_present(pud) && !pud_table(pud))
#define pud_valid(pud)		pte_valid(pud_pte(pud))

static inline void set_pud(pud_t *pudp, pud_t pud)
+4 −6
Original line number Diff line number Diff line
@@ -400,6 +400,9 @@ validate_group(struct perf_event *event)
	if (!validate_event(event->pmu, &fake_pmu, leader))
		return -EINVAL;

	if (event == leader)
		return 0;

	for_each_sibling_event(sibling, leader) {
		if (!validate_event(event->pmu, &fake_pmu, sibling))
			return -EINVAL;
@@ -489,12 +492,7 @@ __hw_perf_event_init(struct perf_event *event)
		local64_set(&hwc->period_left, hwc->sample_period);
	}

	if (event->group_leader != event) {
		if (validate_group(event) != 0)
			return -EINVAL;
	}

	return 0;
	return validate_group(event);
}

static int armpmu_event_init(struct perf_event *event)