Unverified Commit 71fc3621 authored by Alexandre Ghiti's avatar Alexandre Ghiti Committed by Palmer Dabbelt
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riscv: Fix P4D_SHIFT definition for 3-level page table mode 



RISC-V kernels support 3,4,5-level page tables at runtime by folding
upper levels.

In case of a 3-level page table, PGDIR is folded into P4D which in turn
is folded into PUD: PGDIR_SHIFT value is correctly set to the same value
as PUD_SHIFT, but P4D_SHIFT is not, then any use of P4D_SHIFT will access
invalid address bits (all set to 1).

Fix this by dynamically defining P4D_SHIFT value, like we already do for
PGDIR_SHIFT.

Fixes: d10efa21 ("riscv: mm: Control p4d's folding by pgtable_l5_enabled")
Signed-off-by: default avatarAlexandre Ghiti <alexghiti@rivosinc.com>
Reviewed-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
Link: https://lore.kernel.org/r/20221201135128.1482189-2-alexghiti@rivosinc.com


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent e923f462

arch/riscv/include/asm/pgtable-64.h

+5 −1
Original line number Diff line number Diff line
@@ -25,7 +25,11 @@ extern bool pgtable_l5_enabled; 
#define PGDIR_MASK      (~(PGDIR_SIZE - 1))



/* p4d is folded into pgd in case of 4-level page table */

#define P4D_SHIFT      39

#define P4D_SHIFT_L3   30

#define P4D_SHIFT_L4   39

#define P4D_SHIFT_L5   39

#define P4D_SHIFT      (pgtable_l5_enabled ? P4D_SHIFT_L5 : \

		(pgtable_l4_enabled ? P4D_SHIFT_L4 : P4D_SHIFT_L3))

#define P4D_SIZE       (_AC(1, UL) << P4D_SHIFT)

#define P4D_MASK       (~(P4D_SIZE - 1))