Loading drivers/dma/stm32-dma.c +6 −14 Original line number Diff line number Diff line Loading @@ -308,20 +308,12 @@ static bool stm32_dma_fifo_threshold_is_allowed(u32 burst, u32 threshold, static bool stm32_dma_is_burst_possible(u32 buf_len, u32 threshold) { switch (threshold) { case STM32_DMA_FIFO_THRESHOLD_FULL: if (buf_len >= STM32_DMA_MAX_BURST) return true; else return false; case STM32_DMA_FIFO_THRESHOLD_HALFFULL: if (buf_len >= STM32_DMA_MAX_BURST / 2) return true; else return false; default: return false; } /* * Buffer or period length has to be aligned on FIFO depth. * Otherwise bytes may be stuck within FIFO at buffer or period * length. */ return ((buf_len % ((threshold + 1) * 4)) == 0); } static u32 stm32_dma_get_best_burst(u32 buf_len, u32 max_burst, u32 threshold, Loading Loading
drivers/dma/stm32-dma.c +6 −14 Original line number Diff line number Diff line Loading @@ -308,20 +308,12 @@ static bool stm32_dma_fifo_threshold_is_allowed(u32 burst, u32 threshold, static bool stm32_dma_is_burst_possible(u32 buf_len, u32 threshold) { switch (threshold) { case STM32_DMA_FIFO_THRESHOLD_FULL: if (buf_len >= STM32_DMA_MAX_BURST) return true; else return false; case STM32_DMA_FIFO_THRESHOLD_HALFFULL: if (buf_len >= STM32_DMA_MAX_BURST / 2) return true; else return false; default: return false; } /* * Buffer or period length has to be aligned on FIFO depth. * Otherwise bytes may be stuck within FIFO at buffer or period * length. */ return ((buf_len % ((threshold + 1) * 4)) == 0); } static u32 stm32_dma_get_best_burst(u32 buf_len, u32 max_burst, u32 threshold, Loading
