Commit 7171e8a1 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'RollBall-Hilink-Turris-10G-copper-SFP-support' 



Marek Behún says:

====================
RollBall / Hilink / Turris 10G copper SFP support

I am resurrecting my attempt to add support for RollBall / Hilink /
Turris 10G copper SFPs modules.

The modules contain Marvell 88X3310 PHY, which can communicate with
the system via sgmii, 2500base-x, 5gbase-r, 10gbase-r or usxgmii mode.

Some of the patches I've taken from Russell King's net-queue [1]
(with some rebasing).

The important change from my previous attempts are:
- I am including the changes needed to phylink and marvell10g driver,
  so that the 88X3310 PHY is configured to use PHY modes supported by
  the host (the PHY defaults to use 10gbase-r only on host's side)
- I have changed the patch that informs phylib about the interfaces
  supported by the host (patch 5 of this series): it now fills in the
  phydev->host_interfaces member only when connecting a PHY that is
  inside a SFP module. This may change in the future.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 3735264d 324e88cb

drivers/net/mdio/mdio-i2c.c

+305 −5
Original line number Diff line number Diff line
@@ -3,6 +3,7 @@ 
 * MDIO I2C bridge

 *

 * Copyright (C) 2015-2016 Russell King

 * Copyright (C) 2021 Marek Behun

 *

 * Network PHYs can appear on I2C buses when they are part of SFP module.

 * This driver exposes these PHYs to the networking PHY code, allowing
@@ -12,6 +13,7 @@ 
#include <linux/i2c.h>

#include <linux/mdio/mdio-i2c.h>

#include <linux/phy.h>

#include <linux/sfp.h>



/*

 * I2C bus addresses 0x50 and 0x51 are normally an EEPROM, which is
@@ -28,7 +30,7 @@ static unsigned int i2c_mii_phy_addr(int phy_id) 
	return phy_id + 0x40;

}



static int i2c_mii_read(struct mii_bus *bus, int phy_id, int reg)

static int i2c_mii_read_default(struct mii_bus *bus, int phy_id, int reg)

{

	struct i2c_adapter *i2c = bus->priv;

	struct i2c_msg msgs[2];
@@ -62,7 +64,8 @@ static int i2c_mii_read(struct mii_bus *bus, int phy_id, int reg) 
	return data[0] << 8 | data[1];

}



static int i2c_mii_write(struct mii_bus *bus, int phy_id, int reg, u16 val)

static int i2c_mii_write_default(struct mii_bus *bus, int phy_id, int reg,

				 u16 val)

{

	struct i2c_adapter *i2c = bus->priv;

	struct i2c_msg msg;
@@ -91,9 +94,288 @@ static int i2c_mii_write(struct mii_bus *bus, int phy_id, int reg, u16 val) 
	return ret < 0 ? ret : 0;

}



struct mii_bus *mdio_i2c_alloc(struct device *parent, struct i2c_adapter *i2c)

/* RollBall SFPs do not access internal PHY via I2C address 0x56, but

 * instead via address 0x51, when SFP page is set to 0x03 and password to

 * 0xffffffff.

 *

 * address  size  contents  description

 * -------  ----  --------  -----------

 * 0x80     1     CMD       0x01/0x02/0x04 for write/read/done

 * 0x81     1     DEV       Clause 45 device

 * 0x82     2     REG       Clause 45 register

 * 0x84     2     VAL       Register value

 */

#define ROLLBALL_PHY_I2C_ADDR		0x51



#define ROLLBALL_PASSWORD		(SFP_VSL + 3)



#define ROLLBALL_CMD_ADDR		0x80

#define ROLLBALL_DATA_ADDR		0x81



#define ROLLBALL_CMD_WRITE		0x01

#define ROLLBALL_CMD_READ		0x02

#define ROLLBALL_CMD_DONE		0x04



#define SFP_PAGE_ROLLBALL_MDIO		3



static int __i2c_transfer_err(struct i2c_adapter *i2c, struct i2c_msg *msgs,

			      int num)

{

	int ret;



	ret = __i2c_transfer(i2c, msgs, num);

	if (ret < 0)

		return ret;

	else if (ret != num)

		return -EIO;

	else

		return 0;

}



static int __i2c_rollball_get_page(struct i2c_adapter *i2c, int bus_addr,

				   u8 *page)

{

	struct i2c_msg msgs[2];

	u8 addr = SFP_PAGE;



	msgs[0].addr = bus_addr;

	msgs[0].flags = 0;

	msgs[0].len = 1;

	msgs[0].buf = &addr;



	msgs[1].addr = bus_addr;

	msgs[1].flags = I2C_M_RD;

	msgs[1].len = 1;

	msgs[1].buf = page;



	return __i2c_transfer_err(i2c, msgs, 2);

}



static int __i2c_rollball_set_page(struct i2c_adapter *i2c, int bus_addr,

				   u8 page)

{

	struct i2c_msg msg;

	u8 buf[2];



	buf[0] = SFP_PAGE;

	buf[1] = page;



	msg.addr = bus_addr;

	msg.flags = 0;

	msg.len = 2;

	msg.buf = buf;



	return __i2c_transfer_err(i2c, &msg, 1);

}



/* In order to not interfere with other SFP code (which possibly may manipulate

 * SFP_PAGE), for every transfer we do this:

 *   1. lock the bus

 *   2. save content of SFP_PAGE

 *   3. set SFP_PAGE to 3

 *   4. do the transfer

 *   5. restore original SFP_PAGE

 *   6. unlock the bus

 * Note that one might think that steps 2 to 5 could be theoretically done all

 * in one call to i2c_transfer (by constructing msgs array in such a way), but

 * unfortunately tests show that this does not work :-( Changed SFP_PAGE does

 * not take into account until i2c_transfer() is done.

 */

static int i2c_transfer_rollball(struct i2c_adapter *i2c,

				 struct i2c_msg *msgs, int num)

{

	int ret, main_err = 0;

	u8 saved_page;



	i2c_lock_bus(i2c, I2C_LOCK_SEGMENT);



	/* save original page */

	ret = __i2c_rollball_get_page(i2c, msgs->addr, &saved_page);

	if (ret)

		goto unlock;



	/* change to RollBall MDIO page */

	ret = __i2c_rollball_set_page(i2c, msgs->addr, SFP_PAGE_ROLLBALL_MDIO);

	if (ret)

		goto unlock;



	/* do the transfer; we try to restore original page if this fails */

	ret = __i2c_transfer_err(i2c, msgs, num);

	if (ret)

		main_err = ret;



	/* restore original page */

	ret = __i2c_rollball_set_page(i2c, msgs->addr, saved_page);



unlock:

	i2c_unlock_bus(i2c, I2C_LOCK_SEGMENT);



	return main_err ? : ret;

}



static int i2c_rollball_mii_poll(struct mii_bus *bus, int bus_addr, u8 *buf,

				 size_t len)

{

	struct i2c_adapter *i2c = bus->priv;

	struct i2c_msg msgs[2];

	u8 cmd_addr, tmp, *res;

	int i, ret;



	cmd_addr = ROLLBALL_CMD_ADDR;



	res = buf ? buf : &tmp;

	len = buf ? len : 1;



	msgs[0].addr = bus_addr;

	msgs[0].flags = 0;

	msgs[0].len = 1;

	msgs[0].buf = &cmd_addr;



	msgs[1].addr = bus_addr;

	msgs[1].flags = I2C_M_RD;

	msgs[1].len = len;

	msgs[1].buf = res;



	/* By experiment it takes up to 70 ms to access a register for these

	 * SFPs. Sleep 20ms between iterations and try 10 times.

	 */

	i = 10;

	do {

		msleep(20);



		ret = i2c_transfer_rollball(i2c, msgs, ARRAY_SIZE(msgs));

		if (ret)

			return ret;



		if (*res == ROLLBALL_CMD_DONE)

			return 0;

	} while (i-- > 0);



	dev_dbg(&bus->dev, "poll timed out\n");



	return -ETIMEDOUT;

}



static int i2c_rollball_mii_cmd(struct mii_bus *bus, int bus_addr, u8 cmd,

				u8 *data, size_t len)

{

	struct i2c_adapter *i2c = bus->priv;

	struct i2c_msg msgs[2];

	u8 cmdbuf[2];



	cmdbuf[0] = ROLLBALL_CMD_ADDR;

	cmdbuf[1] = cmd;



	msgs[0].addr = bus_addr;

	msgs[0].flags = 0;

	msgs[0].len = len;

	msgs[0].buf = data;



	msgs[1].addr = bus_addr;

	msgs[1].flags = 0;

	msgs[1].len = sizeof(cmdbuf);

	msgs[1].buf = cmdbuf;



	return i2c_transfer_rollball(i2c, msgs, ARRAY_SIZE(msgs));

}



static int i2c_mii_read_rollball(struct mii_bus *bus, int phy_id, int reg)

{

	u8 buf[4], res[6];

	int bus_addr, ret;

	u16 val;



	if (!(reg & MII_ADDR_C45))

		return -EOPNOTSUPP;



	bus_addr = i2c_mii_phy_addr(phy_id);

	if (bus_addr != ROLLBALL_PHY_I2C_ADDR)

		return 0xffff;



	buf[0] = ROLLBALL_DATA_ADDR;

	buf[1] = (reg >> 16) & 0x1f;

	buf[2] = (reg >> 8) & 0xff;

	buf[3] = reg & 0xff;



	ret = i2c_rollball_mii_cmd(bus, bus_addr, ROLLBALL_CMD_READ, buf,

				   sizeof(buf));

	if (ret < 0)

		return ret;



	ret = i2c_rollball_mii_poll(bus, bus_addr, res, sizeof(res));

	if (ret == -ETIMEDOUT)

		return 0xffff;

	else if (ret < 0)

		return ret;



	val = res[4] << 8 | res[5];



	return val;

}



static int i2c_mii_write_rollball(struct mii_bus *bus, int phy_id, int reg,

				  u16 val)

{

	int bus_addr, ret;

	u8 buf[6];



	if (!(reg & MII_ADDR_C45))

		return -EOPNOTSUPP;



	bus_addr = i2c_mii_phy_addr(phy_id);

	if (bus_addr != ROLLBALL_PHY_I2C_ADDR)

		return 0;



	buf[0] = ROLLBALL_DATA_ADDR;

	buf[1] = (reg >> 16) & 0x1f;

	buf[2] = (reg >> 8) & 0xff;

	buf[3] = reg & 0xff;

	buf[4] = val >> 8;

	buf[5] = val & 0xff;



	ret = i2c_rollball_mii_cmd(bus, bus_addr, ROLLBALL_CMD_WRITE, buf,

				   sizeof(buf));

	if (ret < 0)

		return ret;



	ret = i2c_rollball_mii_poll(bus, bus_addr, NULL, 0);

	if (ret < 0)

		return ret;



	return 0;

}



static int i2c_mii_init_rollball(struct i2c_adapter *i2c)

{

	struct i2c_msg msg;

	u8 pw[5];

	int ret;



	pw[0] = ROLLBALL_PASSWORD;

	pw[1] = 0xff;

	pw[2] = 0xff;

	pw[3] = 0xff;

	pw[4] = 0xff;



	msg.addr = ROLLBALL_PHY_I2C_ADDR;

	msg.flags = 0;

	msg.len = sizeof(pw);

	msg.buf = pw;



	ret = i2c_transfer(i2c, &msg, 1);

	if (ret < 0)

		return ret;

	else if (ret != 1)

		return -EIO;

	else

		return 0;

}



struct mii_bus *mdio_i2c_alloc(struct device *parent, struct i2c_adapter *i2c,

			       enum mdio_i2c_proto protocol)

{

	struct mii_bus *mii;

	int ret;



	if (!i2c_check_functionality(i2c, I2C_FUNC_I2C))

		return ERR_PTR(-EINVAL);
@@ -104,10 +386,28 @@ struct mii_bus *mdio_i2c_alloc(struct device *parent, struct i2c_adapter *i2c) 


	snprintf(mii->id, MII_BUS_ID_SIZE, "i2c:%s", dev_name(parent));

	mii->parent = parent;

	mii->read = i2c_mii_read;

	mii->write = i2c_mii_write;

	mii->priv = i2c;



	switch (protocol) {

	case MDIO_I2C_ROLLBALL:

		ret = i2c_mii_init_rollball(i2c);

		if (ret < 0) {

			dev_err(parent,

				"Cannot initialize RollBall MDIO I2C protocol: %d\n",

				ret);

			mdiobus_free(mii);

			return ERR_PTR(ret);

		}



		mii->read = i2c_mii_read_rollball;

		mii->write = i2c_mii_write_rollball;

		break;

	default:

		mii->read = i2c_mii_read_default;

		mii->write = i2c_mii_write_default;

		break;

	}



	return mii;

}

EXPORT_SYMBOL_GPL(mdio_i2c_alloc);

drivers/net/phy/at803x.c

+2 −1
Original line number Diff line number Diff line
@@ -676,6 +676,7 @@ static int at803x_sfp_insert(void *upstream, const struct sfp_eeprom_id *id) 
	struct phy_device *phydev = upstream;

	__ETHTOOL_DECLARE_LINK_MODE_MASK(phy_support);

	__ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);

	DECLARE_PHY_INTERFACE_MASK(interfaces);

	phy_interface_t iface;



	linkmode_zero(phy_support);
@@ -686,7 +687,7 @@ static int at803x_sfp_insert(void *upstream, const struct sfp_eeprom_id *id) 
	phylink_set(phy_support, Asym_Pause);



	linkmode_zero(sfp_support);

	sfp_parse_support(phydev->sfp_bus, id, sfp_support);

	sfp_parse_support(phydev->sfp_bus, id, sfp_support, interfaces);

	/* Some modules support 10G modes as well as others we support.

	 * Mask out non-supported modes so the correct interface is picked.

	 */

drivers/net/phy/marvell-88x2222.c

+2 −1
Original line number Diff line number Diff line
@@ -478,6 +478,7 @@ static int mv2222_config_init(struct phy_device *phydev) 


static int mv2222_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)

{

	DECLARE_PHY_INTERFACE_MASK(interfaces);

	struct phy_device *phydev = upstream;

	phy_interface_t sfp_interface;

	struct mv2222_data *priv;
@@ -489,7 +490,7 @@ static int mv2222_sfp_insert(void *upstream, const struct sfp_eeprom_id *id) 
	priv = (struct mv2222_data *)phydev->priv;

	dev = &phydev->mdio.dev;



	sfp_parse_support(phydev->sfp_bus, id, sfp_supported);

	sfp_parse_support(phydev->sfp_bus, id, sfp_supported, interfaces);

	phydev->port = sfp_parse_port(phydev->sfp_bus, id, sfp_supported);

	sfp_interface = sfp_select_interface(phydev->sfp_bus, sfp_supported);

drivers/net/phy/marvell.c

+2 −1
Original line number Diff line number Diff line
@@ -2845,6 +2845,7 @@ static int marvell_probe(struct phy_device *phydev) 


static int m88e1510_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)

{

	DECLARE_PHY_INTERFACE_MASK(interfaces);

	struct phy_device *phydev = upstream;

	phy_interface_t interface;

	struct device *dev;
@@ -2856,7 +2857,7 @@ static int m88e1510_sfp_insert(void *upstream, const struct sfp_eeprom_id *id) 


	dev = &phydev->mdio.dev;



	sfp_parse_support(phydev->sfp_bus, id, supported);

	sfp_parse_support(phydev->sfp_bus, id, supported, interfaces);

	interface = sfp_select_interface(phydev->sfp_bus, supported);



	dev_info(dev, "%s SFP module inserted\n", phy_modes(interface));

drivers/net/phy/marvell10g.c

+123 −10
Original line number Diff line number Diff line
@@ -96,6 +96,11 @@ enum { 
	MV_PCS_PORT_INFO_NPORTS_MASK	= 0x0380,

	MV_PCS_PORT_INFO_NPORTS_SHIFT	= 7,



	/* SerDes reinitialization 88E21X0 */

	MV_AN_21X0_SERDES_CTRL2	= 0x800f,

	MV_AN_21X0_SERDES_CTRL2_AUTO_INIT_DIS	= BIT(13),

	MV_AN_21X0_SERDES_CTRL2_RUN_INIT	= BIT(15),



	/* These registers appear at 0x800X and 0xa00X - the 0xa00X control

	 * registers appear to set themselves to the 0x800X when AN is

	 * restarted, but status registers appear readable from either.
@@ -140,6 +145,8 @@ struct mv3310_chip { 
	bool (*has_downshift)(struct phy_device *phydev);

	void (*init_supported_interfaces)(unsigned long *mask);

	int (*get_mactype)(struct phy_device *phydev);

	int (*set_mactype)(struct phy_device *phydev, int mactype);

	int (*select_mactype)(unsigned long *interfaces);

	int (*init_interface)(struct phy_device *phydev, int mactype);



#ifdef CONFIG_HWMON
@@ -466,9 +473,10 @@ static int mv3310_sfp_insert(void *upstream, const struct sfp_eeprom_id *id) 
{

	struct phy_device *phydev = upstream;

	__ETHTOOL_DECLARE_LINK_MODE_MASK(support) = { 0, };

	DECLARE_PHY_INTERFACE_MASK(interfaces);

	phy_interface_t iface;



	sfp_parse_support(phydev->sfp_bus, id, support);

	sfp_parse_support(phydev->sfp_bus, id, support, interfaces);

	iface = sfp_select_interface(phydev->sfp_bus, support);



	if (iface != PHY_INTERFACE_MODE_10GBASER) {
@@ -593,6 +601,49 @@ static int mv2110_get_mactype(struct phy_device *phydev) 
	return mactype & MV_PMA_21X0_PORT_CTRL_MACTYPE_MASK;

}



static int mv2110_set_mactype(struct phy_device *phydev, int mactype)

{

	int err, val;



	mactype &= MV_PMA_21X0_PORT_CTRL_MACTYPE_MASK;

	err = phy_modify_mmd(phydev, MDIO_MMD_PMAPMD, MV_PMA_21X0_PORT_CTRL,

			     MV_PMA_21X0_PORT_CTRL_SWRST |

			     MV_PMA_21X0_PORT_CTRL_MACTYPE_MASK,

			     MV_PMA_21X0_PORT_CTRL_SWRST | mactype);

	if (err)

		return err;



	err = phy_set_bits_mmd(phydev, MDIO_MMD_AN, MV_AN_21X0_SERDES_CTRL2,

			       MV_AN_21X0_SERDES_CTRL2_AUTO_INIT_DIS |

			       MV_AN_21X0_SERDES_CTRL2_RUN_INIT);

	if (err)

		return err;



	err = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_AN,

					MV_AN_21X0_SERDES_CTRL2, val,

					!(val &

					  MV_AN_21X0_SERDES_CTRL2_RUN_INIT),

					5000, 100000, true);

	if (err)

		return err;



	return phy_clear_bits_mmd(phydev, MDIO_MMD_AN, MV_AN_21X0_SERDES_CTRL2,

				  MV_AN_21X0_SERDES_CTRL2_AUTO_INIT_DIS);

}



static int mv2110_select_mactype(unsigned long *interfaces)

{

	if (test_bit(PHY_INTERFACE_MODE_USXGMII, interfaces))

		return MV_PMA_21X0_PORT_CTRL_MACTYPE_USXGMII;

	else if (test_bit(PHY_INTERFACE_MODE_SGMII, interfaces) &&

		 !test_bit(PHY_INTERFACE_MODE_10GBASER, interfaces))

		return MV_PMA_21X0_PORT_CTRL_MACTYPE_5GBASER;

	else if (test_bit(PHY_INTERFACE_MODE_10GBASER, interfaces))

		return MV_PMA_21X0_PORT_CTRL_MACTYPE_10GBASER_RATE_MATCH;

	else

		return -1;

}



static int mv3310_get_mactype(struct phy_device *phydev)

{

	int mactype;
@@ -604,6 +655,46 @@ static int mv3310_get_mactype(struct phy_device *phydev) 
	return mactype & MV_V2_33X0_PORT_CTRL_MACTYPE_MASK;

}



static int mv3310_set_mactype(struct phy_device *phydev, int mactype)

{

	int ret;



	mactype &= MV_V2_33X0_PORT_CTRL_MACTYPE_MASK;

	ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL,

				     MV_V2_33X0_PORT_CTRL_MACTYPE_MASK,

				     mactype);

	if (ret <= 0)

		return ret;



	return phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL,

				MV_V2_33X0_PORT_CTRL_SWRST);

}



static int mv3310_select_mactype(unsigned long *interfaces)

{

	if (test_bit(PHY_INTERFACE_MODE_USXGMII, interfaces))

		return MV_V2_33X0_PORT_CTRL_MACTYPE_USXGMII;

	else if (test_bit(PHY_INTERFACE_MODE_SGMII, interfaces) &&

		 test_bit(PHY_INTERFACE_MODE_10GBASER, interfaces))

		return MV_V2_33X0_PORT_CTRL_MACTYPE_10GBASER;

	else if (test_bit(PHY_INTERFACE_MODE_SGMII, interfaces) &&

		 test_bit(PHY_INTERFACE_MODE_RXAUI, interfaces))

		return MV_V2_33X0_PORT_CTRL_MACTYPE_RXAUI;

	else if (test_bit(PHY_INTERFACE_MODE_SGMII, interfaces) &&

		 test_bit(PHY_INTERFACE_MODE_XAUI, interfaces))

		return MV_V2_3310_PORT_CTRL_MACTYPE_XAUI;

	else if (test_bit(PHY_INTERFACE_MODE_10GBASER, interfaces))

		return MV_V2_33X0_PORT_CTRL_MACTYPE_10GBASER_RATE_MATCH;

	else if (test_bit(PHY_INTERFACE_MODE_RXAUI, interfaces))

		return MV_V2_33X0_PORT_CTRL_MACTYPE_RXAUI_RATE_MATCH;

	else if (test_bit(PHY_INTERFACE_MODE_XAUI, interfaces))

		return MV_V2_3310_PORT_CTRL_MACTYPE_XAUI_RATE_MATCH;

	else if (test_bit(PHY_INTERFACE_MODE_SGMII, interfaces))

		return MV_V2_33X0_PORT_CTRL_MACTYPE_10GBASER;

	else

		return -1;

}



static int mv2110_init_interface(struct phy_device *phydev, int mactype)

{

	struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev);
@@ -687,6 +778,20 @@ static int mv3310_config_init(struct phy_device *phydev) 
	if (err)

		return err;



	/* If host provided host supported interface modes, try to select the

	 * best one

	 */

	if (!phy_interface_empty(phydev->host_interfaces)) {

		mactype = chip->select_mactype(phydev->host_interfaces);

		if (mactype >= 0) {

			phydev_info(phydev, "Changing MACTYPE to %i\n",

				    mactype);

			err = chip->set_mactype(phydev, mactype);

			if (err)

				return err;

		}

	}



	mactype = chip->get_mactype(phydev);

	if (mactype < 0)

		return mactype;
@@ -1049,6 +1154,8 @@ static const struct mv3310_chip mv3310_type = { 
	.has_downshift = mv3310_has_downshift,

	.init_supported_interfaces = mv3310_init_supported_interfaces,

	.get_mactype = mv3310_get_mactype,

	.set_mactype = mv3310_set_mactype,

	.select_mactype = mv3310_select_mactype,

	.init_interface = mv3310_init_interface,



#ifdef CONFIG_HWMON
@@ -1060,6 +1167,8 @@ static const struct mv3310_chip mv3340_type = { 
	.has_downshift = mv3310_has_downshift,

	.init_supported_interfaces = mv3340_init_supported_interfaces,

	.get_mactype = mv3310_get_mactype,

	.set_mactype = mv3310_set_mactype,

	.select_mactype = mv3310_select_mactype,

	.init_interface = mv3340_init_interface,



#ifdef CONFIG_HWMON
@@ -1070,6 +1179,8 @@ static const struct mv3310_chip mv3340_type = { 
static const struct mv3310_chip mv2110_type = {

	.init_supported_interfaces = mv2110_init_supported_interfaces,

	.get_mactype = mv2110_get_mactype,

	.set_mactype = mv2110_set_mactype,

	.select_mactype = mv2110_select_mactype,

	.init_interface = mv2110_init_interface,



#ifdef CONFIG_HWMON
@@ -1080,6 +1191,8 @@ static const struct mv3310_chip mv2110_type = { 
static const struct mv3310_chip mv2111_type = {

	.init_supported_interfaces = mv2111_init_supported_interfaces,

	.get_mactype = mv2110_get_mactype,

	.set_mactype = mv2110_set_mactype,

	.select_mactype = mv2110_select_mactype,

	.init_interface = mv2110_init_interface,



#ifdef CONFIG_HWMON