Unverified Commit 70cdf5e2 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'imx-dt64-6.5' of... 

Merge tag 'imx-dt64-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt

i.MX arm64 device tree for 6.5:

- New board support: i.MX8MM based Emtop SoM & Baseboard, NXP i.MX8MM EVKB
  board, i.MX8MP based Gateworks Venice gw7905-2x device.
- A series from Adam Ford to add Camera and Audio support for i.MX8M
  based Beacon boards.
- Add Audio output support for i.MX8MP TQMa8MPxL/MBa8MPxL board.
- Add HDMI and display support for imx8mm-evk and imx8mm-phg board.
- Add coresight trace devices support for i.MX8MP SoC.
- A couple of changes from Krzysztof Kozlowski to add missing cache
  properties.
- A couple of changes from Laurent Pinchart to add CSIS and ISI devices
  for i.MX8MP SoC.
- A series from Marek Vasut to add more devices for i.MX8MP, and enable
  SAI audio on i.MX8MP DHCOM PDK2 and PDK3.
- Correct GSC vdd_bat data size for Gateworks Venice devices.
- Add more device support for i.MX93, Watchdog, OCOTP, idle states, DDR
  performance monitor, etc.
- Small and random clean-ups and device node additions.

* tag 'imx-dt64-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (47 commits)
  arm64: dts: imx8mq: Pass address-cells/size-cells to mipi_dsi
  arm64: dts: imx8mq: Use 'dsi' as node name
  arm64: dts: imx8mp-venice-gw702x: fix GSC vdd_bat data size
  arm64: dts: imx8mq-tqma8mq-mba8mx: Remove invalid properties
  arm64: dts: imx8mq: Add missing pci property
  arm64: dts: imx8mq: Fix lcdif clocks
  arm64: dts: imx8mq: Fix lcdif compatible
  arm64: dts: imx8mp: don't initialize audio clocks from CCM node
  arm64: dts: imx8mm-venice: Fix GSC vdd_bat data size.
  arm64: dts: imx8mp: Add coresight trace components
  arm64: dts: imx93: add ddr performance monitor node
  arm64: dts: imx8mm-phg: Add display support
  arm64: dts: tqma8mqml: Add vcc supply to i2c eeproms
  arm64: dts: imx8mm-evk: Add HDMI support
  arm64: dts: imx8mn-var-som-symphony: adapt FEC pinctrl for SOMs with onboard PHY
  arm64: dts: imx8mn-var-som: add 20ms delay to ethernet regulator enable
  arm64: dts: imx8mp-msc-sm2s: Add sound card
  arm64: dts: imx8mn-beacon: Migrate sound card to simple-audio-card
  arm64: dts: imx8mp-beacon-kit: Enable WM8962 Audio CODEC
  arm64: dts: imx93: add fsl,stop-mode property to support WOL
  ...

Link: https://lore.kernel.org/r/20230610072530.418847-3-shawnguo@kernel.org


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents f50a4e59 8e2facfe

arch/arm64/boot/dts/freescale/Makefile

+3 −0
Original line number Original line Diff line number Diff line
@@ -54,7 +54,9 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb 
dtb-$(CONFIG_ARCH_MXC) += imx8mm-data-modul-edm-sbc.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-data-modul-edm-sbc.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-emcon-avari.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-emcon-avari.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-emtop-baseboard.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-evkb.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-ctouch2.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-ctouch2.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-edimm2.2.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-edimm2.2.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-innocomm-wb15-evk.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-innocomm-wb15-evk.dtb
@@ -99,6 +101,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb 
dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mpxl.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mpxl.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw74xx.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw74xx.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw7905-2x.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-dahlia.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-dahlia.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-dev.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-dev.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-yavia.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-yavia.dtb

arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi

+1 −0
Original line number Original line Diff line number Diff line
@@ -47,6 +47,7 @@ 
		l2: l2-cache {

		l2: l2-cache {

			compatible = "cache";

			compatible = "cache";

			cache-level = <2>;

			cache-level = <2>;

			cache-unified;

		};

		};

	};

	};

arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi

+1 −0
Original line number Original line Diff line number Diff line
@@ -85,6 +85,7 @@ 
		l2: l2-cache {

		l2: l2-cache {

			compatible = "cache";

			compatible = "cache";

			cache-level = <2>;

			cache-level = <2>;

			cache-unified;

		};

		};

	};

	};

arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi

+1 −0
Original line number Original line Diff line number Diff line
@@ -80,6 +80,7 @@ 
		l2: l2-cache {

		l2: l2-cache {

			compatible = "cache";

			compatible = "cache";

			cache-level = <2>;

			cache-level = <2>;

			cache-unified;

		};

		};

	};

	};

arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi

+4 −0
Original line number Original line Diff line number Diff line
@@ -96,21 +96,25 @@ 
	cluster0_l2: l2-cache0 {

	cluster0_l2: l2-cache0 {

		compatible = "cache";

		compatible = "cache";

		cache-level = <2>;

		cache-level = <2>;

		cache-unified;

	};

	};





	cluster1_l2: l2-cache1 {

	cluster1_l2: l2-cache1 {

		compatible = "cache";

		compatible = "cache";

		cache-level = <2>;

		cache-level = <2>;

		cache-unified;

	};

	};





	cluster2_l2: l2-cache2 {

	cluster2_l2: l2-cache2 {

		compatible = "cache";

		compatible = "cache";

		cache-level = <2>;

		cache-level = <2>;

		cache-unified;

	};

	};





	cluster3_l2: l2-cache3 {

	cluster3_l2: l2-cache3 {

		compatible = "cache";

		compatible = "cache";

		cache-level = <2>;

		cache-level = <2>;

		cache-unified;

	};

	};





	CPU_PW20: cpu-pw20 {

	CPU_PW20: cpu-pw20 {