Commit 7081556f authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Bjorn Helgaas
Browse files

PCI: qcom: Add support for ddrss_sf_tbu clock 

On SM8250 additional clock is required for PCIe devices to access NOC.
Update PCIe controller driver to control this clock.

Link: https://lore.kernel.org/r/20210117013114.441973-3-dmitry.baryshkov@linaro.org


Fixes: e1dd639e ("PCI: qcom: Add SM8250 SoC support")
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: default avatarStanimir Varbanov <svarbanov@mm-sol.com>
parent c9f04600

drivers/pci/controller/dwc/pcie-qcom.c

+13 −5
Original line number Diff line number Diff line
@@ -159,8 +159,10 @@ struct qcom_pcie_resources_2_3_3 { 
	struct reset_control *rst[7];

};



/* 6 clocks typically, 7 for sm8250 */

struct qcom_pcie_resources_2_7_0 {

	struct clk_bulk_data clks[6];

	struct clk_bulk_data clks[7];

	int num_clks;

	struct regulator_bulk_data supplies[2];

	struct reset_control *pci_reset;

	struct clk *pipe_clk;
@@ -1152,8 +1154,14 @@ static int qcom_pcie_get_resources_2_7_0(struct qcom_pcie *pcie) 
	res->clks[3].id = "bus_slave";

	res->clks[4].id = "slave_q2a";

	res->clks[5].id = "tbu";

	if (of_device_is_compatible(dev->of_node, "qcom,pcie-sm8250")) {

		res->clks[6].id = "ddrss_sf_tbu";

		res->num_clks = 7;

	} else {

		res->num_clks = 6;

	}



	ret = devm_clk_bulk_get(dev, ARRAY_SIZE(res->clks), res->clks);

	ret = devm_clk_bulk_get(dev, res->num_clks, res->clks);

	if (ret < 0)

		return ret;
@@ -1175,7 +1183,7 @@ static int qcom_pcie_init_2_7_0(struct qcom_pcie *pcie) 
		return ret;

	}



	ret = clk_bulk_prepare_enable(ARRAY_SIZE(res->clks), res->clks);

	ret = clk_bulk_prepare_enable(res->num_clks, res->clks);

	if (ret < 0)

		goto err_disable_regulators;
@@ -1227,7 +1235,7 @@ static int qcom_pcie_init_2_7_0(struct qcom_pcie *pcie) 


	return 0;

err_disable_clocks:

	clk_bulk_disable_unprepare(ARRAY_SIZE(res->clks), res->clks);

	clk_bulk_disable_unprepare(res->num_clks, res->clks);

err_disable_regulators:

	regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies);
@@ -1238,7 +1246,7 @@ static void qcom_pcie_deinit_2_7_0(struct qcom_pcie *pcie) 
{

	struct qcom_pcie_resources_2_7_0 *res = &pcie->res.v2_7_0;



	clk_bulk_disable_unprepare(ARRAY_SIZE(res->clks), res->clks);

	clk_bulk_disable_unprepare(res->num_clks, res->clks);

	regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies);

}