Commit 7054d39c authored by Nithin Dabilpuram's avatar Nithin Dabilpuram Committed by Jakub Kicinski
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octeontx2-af: Perform cpt lf teardown in non FLR path 



Perform CPT LF teardown in non FLR path as well via cpt_lf_free()
Currently CPT LF teardown and reset sequence is only
done when FLR is handled with CPT LF still attached.

This patch also fixes cpt_lf_alloc() to set EXEC_LDWB in
CPT_AF_LFX_CTL2 when being completely overwritten as that is
the default value and is better for performance.

Signed-off-by: default avatarNithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 48260907

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

+2 −1
Original line number Diff line number Diff line
@@ -2532,7 +2532,8 @@ static void rvu_blklf_teardown(struct rvu *rvu, u16 pcifunc, u8 blkaddr) 
			rvu_npa_lf_teardown(rvu, pcifunc, lf);

		else if ((block->addr == BLKADDR_CPT0) ||

			 (block->addr == BLKADDR_CPT1))

			rvu_cpt_lf_teardown(rvu, pcifunc, lf, slot);

			rvu_cpt_lf_teardown(rvu, pcifunc, block->addr, lf,

					    slot);



		err = rvu_lf_reset(rvu, block, lf);

		if (err) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

+2 −1
Original line number Diff line number Diff line
@@ -815,7 +815,8 @@ bool is_mcam_entry_enabled(struct rvu *rvu, struct npc_mcam *mcam, int blkaddr, 
/* CPT APIs */

int rvu_cpt_register_interrupts(struct rvu *rvu);

void rvu_cpt_unregister_interrupts(struct rvu *rvu);

int rvu_cpt_lf_teardown(struct rvu *rvu, u16 pcifunc, int lf, int slot);

int rvu_cpt_lf_teardown(struct rvu *rvu, u16 pcifunc, int blkaddr, int lf,

			int slot);



/* CN10K RVU */

int rvu_set_channels_base(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

+18 −14
Original line number Diff line number Diff line
@@ -377,9 +377,13 @@ int rvu_mbox_handler_cpt_lf_alloc(struct rvu *rvu, 


		rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), val);



		/* Set CPT LF NIX_PF_FUNC and SSO_PF_FUNC */

		val = (u64)req->nix_pf_func << 48 |

		      (u64)req->sso_pf_func << 32;

		/* Set CPT LF NIX_PF_FUNC and SSO_PF_FUNC. EXE_LDWB is set

		 * on reset.

		 */

		val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf));

		val &= ~(GENMASK_ULL(63, 48) | GENMASK_ULL(47, 32));

		val |= ((u64)req->nix_pf_func << 48 |

			(u64)req->sso_pf_func << 32);

		rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), val);

	}
@@ -389,7 +393,7 @@ int rvu_mbox_handler_cpt_lf_alloc(struct rvu *rvu, 
static int cpt_lf_free(struct rvu *rvu, struct msg_req *req, int blkaddr)

{

	u16 pcifunc = req->hdr.pcifunc;

	int num_lfs, cptlf, slot;

	int num_lfs, cptlf, slot, err;

	struct rvu_block *block;



	block = &rvu->hw->block[blkaddr];
@@ -403,10 +407,15 @@ static int cpt_lf_free(struct rvu *rvu, struct msg_req *req, int blkaddr) 
		if (cptlf < 0)

			return CPT_AF_ERR_LF_INVALID;



		/* Reset CPT LF group and priority */

		rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), 0x0);

		/* Reset CPT LF NIX_PF_FUNC and SSO_PF_FUNC */

		rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), 0x0);

		/* Perform teardown */

		rvu_cpt_lf_teardown(rvu, pcifunc, blkaddr, cptlf, slot);



		/* Reset LF */

		err = rvu_lf_reset(rvu, block, cptlf);

		if (err) {

			dev_err(rvu->dev, "Failed to reset blkaddr %d LF%d\n",

				block->addr, cptlf);

		}

	}



	return 0;
@@ -850,15 +859,10 @@ static void cpt_lf_disable_iqueue(struct rvu *rvu, int blkaddr, int slot) 
		dev_warn(rvu->dev, "CPT FLR hits hard loop counter\n");

}



int rvu_cpt_lf_teardown(struct rvu *rvu, u16 pcifunc, int lf, int slot)

int rvu_cpt_lf_teardown(struct rvu *rvu, u16 pcifunc, int blkaddr, int lf, int slot)

{

	int blkaddr;

	u64 reg;



	blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_CPT, pcifunc);

	if (blkaddr != BLKADDR_CPT0 && blkaddr != BLKADDR_CPT1)

		return -EINVAL;



	/* Enable BAR2 ALIAS for this pcifunc. */

	reg = BIT_ULL(16) | pcifunc;

	rvu_write64(rvu, blkaddr, CPT_AF_BAR2_SEL, reg);