Commit 704edf03 authored by Konrad Dybcio's avatar Konrad Dybcio Committed by Bjorn Andersson
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arm64: dts: qcom: sm6375: Add pin configs for some QUP configurations 



Add the pin setup for SPI/I2C configurations that are supported
downstream. I can guesstimate the correct settings for other buses,
but:

- I have no hardware to test it on
- Some QUPs are straight up missing pin funcs in TLMM
- Vendors probably didn't really care and used whatever was there in
the reference design and BSP - should any other be used, they can be
configured at a later time

Acked-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221115152727.9736-5-konrad.dybcio@linaro.org
parent 42b8e5ee

arch/arm64/boot/dts/qcom/sm6375.dtsi

+43 −0
Original line number Diff line number Diff line
@@ -519,6 +519,49 @@ 
			gpio-controller;

			#interrupt-cells = <2>;

			#gpio-cells = <2>;



			qup_i2c0_default: qup-i2c0-default-state {

				pins = "gpio0", "gpio1";

				function = "qup00";

				drive-strength = <2>;

				bias-pull-up;

			};



			qup_i2c1_default: qup-i2c1-default-state {

				pins = "gpio61", "gpio62";

				function = "qup01";

				drive-strength = <2>;

				bias-pull-up;

			};



			qup_i2c2_default: qup-i2c2-default-state {

				pins = "gpio45", "gpio46";

				function = "qup02";

				drive-strength = <2>;

				bias-pull-up;

			};



			qup_i2c8_default: qup-i2c8-default-state {

				pins = "gpio19", "gpio20";

				/* TLMM, GCC and vendor DT all have different indices.. */

				function = "qup12";

				drive-strength = <2>;

				bias-pull-up;

			};



			qup_i2c10_default: qup-i2c10-default-state {

				pins = "gpio4", "gpio5";

				function = "qup10";

				drive-strength = <2>;

				bias-pull-up;

			};



			qup_spi0_default: qup-spi0-default-state {

				pins = "gpio0", "gpio1", "gpio2", "gpio3";

				function = "qup00";

				drive-strength = <6>;

				bias-disable;

			};

		};



		gcc: clock-controller@1400000 {