Commit 704052f5 authored by Chia-Yuan Li's avatar Chia-Yuan Li Committed by Kalle Valo
Browse files

wifi: rtw89: 8852c: set TBTT shift configuration 



It is found that 8852ce loses some beacon after
enabling deep ps mode. We set TBTT shift to wake up
firmware early to open RF/BB for receiving beacon in time.

Signed-off-by: default avatarChia-Yuan Li <leo.li@realtek.com>
Signed-off-by: default avatarPo-Hao Huang <phhuang@realtek.com>
Signed-off-by: default avatarPing-Ke Shih <pkshih@realtek.com>
Signed-off-by: default avatarKalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20220819064811.37700-3-pkshih@realtek.com
parent 48c0e347

drivers/net/wireless/realtek/rtw89/mac.c

+21 −0
Original line number Diff line number Diff line
@@ -3550,6 +3550,26 @@ static void rtw89_mac_port_cfg_bcn_early(struct rtw89_dev *rtwdev, 
				BCN_ERLY_DEF);

}



static void rtw89_mac_port_cfg_tbtt_shift(struct rtw89_dev *rtwdev,

					  struct rtw89_vif *rtwvif)

{

	const struct rtw89_port_reg *p = &rtw_port_base;

	u16 val;



	if (rtwdev->chip->chip_id != RTL8852C)

		return;



	if (rtwvif->wifi_role != RTW89_WIFI_ROLE_P2P_CLIENT &&

	    rtwvif->wifi_role != RTW89_WIFI_ROLE_STATION)

		return;



	val = FIELD_PREP(B_AX_TBTT_SHIFT_OFST_MAG, 1) |

			 B_AX_TBTT_SHIFT_OFST_SIGN;



	rtw89_write16_port_mask(rtwdev, rtwvif, p->tbtt_shift,

				B_AX_TBTT_SHIFT_OFST_MASK, val);

}



int rtw89_mac_vif_init(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)

{

	int ret;
@@ -3624,6 +3644,7 @@ int rtw89_mac_port_update(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) 
	rtw89_mac_port_cfg_bcn_hold_time(rtwdev, rtwvif);

	rtw89_mac_port_cfg_bcn_mask_area(rtwdev, rtwvif);

	rtw89_mac_port_cfg_tbtt_early(rtwdev, rtwvif);

	rtw89_mac_port_cfg_tbtt_shift(rtwdev, rtwvif);

	rtw89_mac_port_cfg_bss_color(rtwdev, rtwvif);

	rtw89_mac_port_cfg_mbssid(rtwdev, rtwvif);

	rtw89_mac_port_cfg_func_en(rtwdev, rtwvif);

drivers/net/wireless/realtek/rtw89/reg.h

+2 −0
Original line number Diff line number Diff line
@@ -2094,6 +2094,8 @@ 
#define R_AX_TBTT_SHIFT_P3 0xC4E8

#define R_AX_TBTT_SHIFT_P4 0xC528

#define B_AX_TBTT_SHIFT_OFST_MASK GENMASK(11, 0)

#define B_AX_TBTT_SHIFT_OFST_SIGN BIT(11)

#define B_AX_TBTT_SHIFT_OFST_MAG GENMASK(10, 0)



#define R_AX_BCN_CNT_TMR_P0 0xC434

#define R_AX_BCN_CNT_TMR_P1 0xC474