Commit 6ffc02d2 authored by Rob Herring's avatar Rob Herring Committed by Lorenzo Pieralisi
Browse files

PCI: dwc: Add a 'num_lanes' field to struct dw_pcie 

Add a 'num_lanes' field to allow drivers to provide a the number of lanes
if not in DT or using a custom DT property. A driver can provide a
non-zero value which is used if the DT doesn't have a 'num-lanes'
property.

Link: https://lore.kernel.org/r/20200821035420.380495-24-robh@kernel.org


Signed-off-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Jingoo Han <jingoohan1@gmail.com>
Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
parent 574523dc

drivers/pci/controller/dwc/pcie-designware.c

+6 −8
Original line number Diff line number Diff line
@@ -546,9 +546,7 @@ static u8 dw_pcie_iatu_unroll_enabled(struct dw_pcie *pci) 


void dw_pcie_setup(struct dw_pcie *pci)

{

	int ret;

	u32 val;

	u32 lanes;

	struct device *dev = pci->dev;

	struct device_node *np = dev->of_node;
@@ -562,16 +560,16 @@ void dw_pcie_setup(struct dw_pcie *pci) 
		"enabled" : "disabled");





	ret = of_property_read_u32(np, "num-lanes", &lanes);

	if (ret) {

		dev_dbg(pci->dev, "property num-lanes isn't found\n");

	of_property_read_u32(np, "num-lanes", &pci->num_lanes);

	if (!pci->num_lanes) {

		dev_dbg(pci->dev, "Using h/w default number of lanes\n");

		return;

	}



	/* Set the number of lanes */

	val = dw_pcie_readl_dbi(pci, PCIE_PORT_LINK_CONTROL);

	val &= ~PORT_LINK_MODE_MASK;

	switch (lanes) {

	switch (pci->num_lanes) {

	case 1:

		val |= PORT_LINK_MODE_1_LANES;

		break;
@@ -585,7 +583,7 @@ void dw_pcie_setup(struct dw_pcie *pci) 
		val |= PORT_LINK_MODE_8_LANES;

		break;

	default:

		dev_err(pci->dev, "num-lanes %u: invalid value\n", lanes);

		dev_err(pci->dev, "num-lanes %u: invalid value\n", pci->num_lanes);

		return;

	}

	dw_pcie_writel_dbi(pci, PCIE_PORT_LINK_CONTROL, val);
@@ -593,7 +591,7 @@ void dw_pcie_setup(struct dw_pcie *pci) 
	/* Set link width speed control register */

	val = dw_pcie_readl_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL);

	val &= ~PORT_LOGIC_LINK_WIDTH_MASK;

	switch (lanes) {

	switch (pci->num_lanes) {

	case 1:

		val |= PORT_LOGIC_LINK_WIDTH_1_LANES;

		break;

drivers/pci/controller/dwc/pcie-designware.h

+1 −0
Original line number Diff line number Diff line
@@ -246,6 +246,7 @@ struct dw_pcie { 
	struct dw_pcie_ep	ep;

	const struct dw_pcie_ops *ops;

	unsigned int		version;

	int			num_lanes;

};



#define to_dw_pcie_from_pp(port) container_of((port), struct dw_pcie, pp)