Unverified Commit 6fa3b3e4 authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
Browse files

!13287 [openEuler-24.03-LTS][linux-6.6.y sync] Backport 6.6.60-6.6.61 LTS Patches 

Merge Pull Request from: @wenzhiwei11 
 
git log --oneline v6.6.60..v6.6.61 | wc -l
119
116+2+1

Merged:
security/keys: fix slab-out-of-bounds in key_task_permission
riscv/purgatory: align riscv_kernel_entry

Conflict:
posix-cpu-timers: Clear TICK_DEP_BIT_POSIX_TIMER on clone 
 
Link:https://gitee.com/openeuler/kernel/pulls/13287

 

Reviewed-by: default avatarZhang Peng <zhangpeng362@huawei.com>
Signed-off-by: default avatarZhang Peng <zhangpeng362@huawei.com>
parents 7589227d da34dd1b

Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml

+1 −1
Original line number Diff line number Diff line
@@ -61,7 +61,7 @@ properties: 
      - gmii

      - rgmii

      - sgmii

      - 1000BaseX

      - 1000base-x



  xlnx,phy-type:

    description:

arch/arm/boot/dts/rockchip/rk3036-kylin.dts

+2 −2
Original line number Diff line number Diff line
@@ -304,8 +304,8 @@ 
&i2c2 {

	status = "okay";



	rt5616: rt5616@1b {

		compatible = "rt5616";

	rt5616: audio-codec@1b {

		compatible = "realtek,rt5616";

		reg = <0x1b>;

		clocks = <&cru SCLK_I2S_OUT>;

		clock-names = "mclk";

arch/arm/boot/dts/rockchip/rk3036.dtsi

+7 −7
Original line number Diff line number Diff line
@@ -382,12 +382,13 @@ 
		};

	};



	acodec: acodec-ana@20030000 {

		compatible = "rk3036-codec";

	acodec: audio-codec@20030000 {

		compatible = "rockchip,rk3036-codec";

		reg = <0x20030000 0x4000>;

		rockchip,grf = <&grf>;

		clock-names = "acodec_pclk";

		clocks = <&cru PCLK_ACODEC>;

		rockchip,grf = <&grf>;

		#sound-dai-cells = <0>;

		status = "disabled";

	};
@@ -397,7 +398,6 @@ 
		interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru  PCLK_HDMI>;

		clock-names = "pclk";

		rockchip,grf = <&grf>;

		pinctrl-names = "default";

		pinctrl-0 = <&hdmi_ctl>;

		status = "disabled";
@@ -550,11 +550,11 @@ 
	};



	spi: spi@20074000 {

		compatible = "rockchip,rockchip-spi";

		compatible = "rockchip,rk3036-spi";

		reg = <0x20074000 0x1000>;

		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru PCLK_SPI>, <&cru SCLK_SPI>;

		clock-names = "apb-pclk","spi_pclk";

		clocks = <&cru SCLK_SPI>, <&cru PCLK_SPI>;

		clock-names = "spiclk", "apb_pclk";

		dmas = <&pdma 8>, <&pdma 9>;

		dma-names = "tx", "rx";

		pinctrl-names = "default";

arch/arm64/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -2346,6 +2346,7 @@ config ARM64_SME 
	bool "ARM Scalable Matrix Extension support"

	default y

	depends on ARM64_SVE

	depends on BROKEN

	help

	  The Scalable Matrix Extension (SME) is an extension to the AArch64

	  execution state which utilises a substantial subset of the SVE

arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -15,7 +15,7 @@ vpu: vpu@2c000000 { 
	mu_m0: mailbox@2d000000 {

		compatible = "fsl,imx6sx-mu";

		reg = <0x2d000000 0x20000>;

		interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;

		interrupts = <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>;

		#mbox-cells = <2>;

		power-domains = <&pd IMX_SC_R_VPU_MU_0>;

		status = "disabled";
@@ -24,7 +24,7 @@ vpu: vpu@2c000000 { 
	mu1_m0: mailbox@2d020000 {

		compatible = "fsl,imx6sx-mu";

		reg = <0x2d020000 0x20000>;

		interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>;

		interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>;

		#mbox-cells = <2>;

		power-domains = <&pd IMX_SC_R_VPU_MU_1>;

		status = "disabled";