Commit 6f81fdde authored by AngeloGioacchino Del Regno's avatar AngeloGioacchino Del Regno Committed by Greg Kroah-Hartman
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serial: 8250_mtk: Make sure to select the right FEATURE_SEL 



Set the FEATURE_SEL at probe time to make sure that BIT(0) is enabled:
this guarantees that when the port is configured as AP UART, the
right register layout is interpreted by the UART IP.

Signed-off-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Cc: stable <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20220427132328.228297-3-angelogioacchino.delregno@collabora.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent bb0b197a

drivers/tty/serial/8250/8250_mtk.c

+7 −0
Original line number Diff line number Diff line
@@ -54,6 +54,9 @@ 
#define MTK_UART_TX_TRIGGER	1

#define MTK_UART_RX_TRIGGER	MTK_UART_RX_SIZE



#define MTK_UART_FEATURE_SEL	39	/* Feature Selection register */

#define MTK_UART_FEAT_NEWRMAP	BIT(0)	/* Use new register map */



#ifdef CONFIG_SERIAL_8250_DMA

enum dma_rx_status {

	DMA_RX_START = 0,
@@ -569,6 +572,10 @@ static int mtk8250_probe(struct platform_device *pdev) 
		uart.dma = data->dma;

#endif



	/* Set AP UART new register map */

	writel(MTK_UART_FEAT_NEWRMAP, uart.port.membase +

	       (MTK_UART_FEATURE_SEL << uart.port.regshift));



	/* Disable Rate Fix function */

	writel(0x0, uart.port.membase +

			(MTK_UART_RATE_FIX << uart.port.regshift));