Commit 6f5f193e authored by Hari Bathini's avatar Hari Bathini Committed by Michael Ellerman
Browse files

powerpc/opal: add MPIPL interface definitions 



MPIPL is Memory Preserving IPL supported from POWER9. This enables the
kernel to reset the system with memory 'preserved'. Also, it supports
copying memory from a source address to some destination address during
MPIPL boot. Add MPIPL interface definitions here to leverage these f/w
features in adding FADump support for PowerNV platform.

Signed-off-by: default avatarHari Bathini <hbathini@linux.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/156821340710.5656.10071829040515662624.stgit@hbathini.in.ibm.com
parent 1679b96e

arch/powerpc/include/asm/opal-api.h

+43 −1
Original line number Diff line number Diff line
@@ -208,7 +208,10 @@ 
#define OPAL_HANDLE_HMI2			166

#define	OPAL_NX_COPROC_INIT			167

#define OPAL_XIVE_GET_VP_STATE			170

#define OPAL_LAST				170

#define OPAL_MPIPL_UPDATE			173

#define OPAL_MPIPL_REGISTER_TAG			174

#define OPAL_MPIPL_QUERY_TAG			175

#define OPAL_LAST				175



#define QUIESCE_HOLD			1 /* Spin all calls at entry */

#define QUIESCE_REJECT			2 /* Fail all calls with OPAL_BUSY */
@@ -1060,6 +1063,7 @@ enum { 
	OPAL_REBOOT_NORMAL		= 0,

	OPAL_REBOOT_PLATFORM_ERROR	= 1,

	OPAL_REBOOT_FULL_IPL		= 2,

	OPAL_REBOOT_MPIPL		= 3,

};



/* Argument to OPAL_PCI_TCE_KILL */
@@ -1136,6 +1140,44 @@ enum { 
#define OPAL_PCI_P2P_LOAD		0x2

#define OPAL_PCI_P2P_STORE		0x4



/* MPIPL update operations */

enum opal_mpipl_ops {

	OPAL_MPIPL_ADD_RANGE			= 0,

	OPAL_MPIPL_REMOVE_RANGE			= 1,

	OPAL_MPIPL_REMOVE_ALL			= 2,

	OPAL_MPIPL_FREE_PRESERVED_MEMORY	= 3,

};



/* Tag will point to various metadata area. Kernel will

 * use tag to get metadata value.

 */

enum opal_mpipl_tags {

	OPAL_MPIPL_TAG_CPU	= 0,

	OPAL_MPIPL_TAG_OPAL	= 1,

	OPAL_MPIPL_TAG_KERNEL	= 2,

	OPAL_MPIPL_TAG_BOOT_MEM	= 3,

};



/* Preserved memory details */

struct opal_mpipl_region {

	__be64	src;

	__be64	dest;

	__be64	size;

};



/* Structure version */

#define OPAL_MPIPL_VERSION		0x01



struct opal_mpipl_fadump {

	u8	version;

	u8	reserved[7];

	__be32	crashing_pir;	/* OPAL crashing CPU PIR */

	__be32	cpu_data_version;

	__be32	cpu_data_size;

	__be32	region_cnt;

	struct	opal_mpipl_region region[];

} __packed;



#endif /* __ASSEMBLY__ */



#endif /* __OPAL_API_H */

arch/powerpc/include/asm/opal.h

+5 −0
Original line number Diff line number Diff line
@@ -39,6 +39,7 @@ int64_t opal_npu_spa_clear_cache(uint64_t phb_id, uint32_t bdfn, 
				uint64_t PE_handle);

int64_t opal_npu_tl_set(uint64_t phb_id, uint32_t bdfn, long cap,

			uint64_t rate_phys, uint32_t size);



int64_t opal_console_write(int64_t term_number, __be64 *length,

			   const uint8_t *buffer);

int64_t opal_console_read(int64_t term_number, __be64 *length,
@@ -297,6 +298,10 @@ int opal_sensor_group_clear(u32 group_hndl, int token); 
int opal_sensor_group_enable(u32 group_hndl, int token, bool enable);

int opal_nx_coproc_init(uint32_t chip_id, uint32_t ct);



s64 opal_mpipl_update(enum opal_mpipl_ops op, u64 src, u64 dest, u64 size);

s64 opal_mpipl_register_tag(enum opal_mpipl_tags tag, u64 addr);

s64 opal_mpipl_query_tag(enum opal_mpipl_tags tag, u64 *addr);



s64 opal_signal_system_reset(s32 cpu);

s64 opal_quiesce(u64 shutdown_type, s32 cpu);

arch/powerpc/platforms/powernv/opal-call.c

+3 −0
Original line number Diff line number Diff line
@@ -287,3 +287,6 @@ OPAL_CALL(opal_pci_set_pbcq_tunnel_bar, OPAL_PCI_SET_PBCQ_TUNNEL_BAR); 
OPAL_CALL(opal_sensor_read_u64,			OPAL_SENSOR_READ_U64);

OPAL_CALL(opal_sensor_group_enable,		OPAL_SENSOR_GROUP_ENABLE);

OPAL_CALL(opal_nx_coproc_init,			OPAL_NX_COPROC_INIT);

OPAL_CALL(opal_mpipl_update,			OPAL_MPIPL_UPDATE);

OPAL_CALL(opal_mpipl_register_tag,		OPAL_MPIPL_REGISTER_TAG);

OPAL_CALL(opal_mpipl_query_tag,			OPAL_MPIPL_QUERY_TAG);