Commit 6f36a4fe authored by Jiantao Xiao's avatar Jiantao Xiao
Browse files

Revert "net: hns3: add vf fault process in hns3 ras" 

driver inclusion
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I8E9UJ


CVE: NA

----------------------------------------------------------------------

This reverts commit 7d0f0027.

Signed-off-by: default avatarJiantao Xiao <xiaojiantao1@h-partners.com>
parent bec16ba6

drivers/net/ethernet/hisilicon/hns3/hnae3.h

+0 −1
Original line number Diff line number Diff line
@@ -324,7 +324,6 @@ enum hnae3_reset_type { 
	HNAE3_GLOBAL_RESET,

	HNAE3_IMP_RESET,

	HNAE3_NONE_RESET,

	HNAE3_VF_EXP_RESET,

	HNAE3_MAX_RESET,

};

drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h

+0 −1
Original line number Diff line number Diff line
@@ -94,7 +94,6 @@ enum hclge_opcode_type { 
	HCLGE_OPC_DFX_GEN_REG		= 0x7038,



	HCLGE_OPC_QUERY_DEV_SPECS	= 0x0050,

	HCLGE_OPC_GET_QUEUE_ERR_VF      = 0x0067,



	/* MAC command */

	HCLGE_OPC_CONFIG_MAC_MODE	= 0x0301,

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c

+5 −108
Original line number Diff line number Diff line
@@ -1737,12 +1737,10 @@ static const struct hclge_hw_type_id hclge_hw_type_id_st[] = { 
		.msg = "tqp_int_ecc_error"

	}, {

		.type_id = PF_ABNORMAL_INT_ERROR,

		.msg = "pf_abnormal_int_error",

		.cause_by_vf = true

		.msg = "pf_abnormal_int_error"

	}, {

		.type_id = MPF_ABNORMAL_INT_ERROR,

		.msg = "mpf_abnormal_int_error",

		.cause_by_vf = true

		.msg = "mpf_abnormal_int_error"

	}, {

		.type_id = COMMON_ERROR,

		.msg = "common_error"
@@ -3202,7 +3200,7 @@ void hclge_handle_occurred_error(struct hclge_dev *hdev) 
		hclge_handle_error_info_log(ae_dev);

}



static bool

static void

hclge_handle_error_type_reg_log(struct hclge_dev *hdev,

				struct hclge_mod_err_info *mod_info,

				struct hclge_type_reg_err_info *type_reg_info)
@@ -3214,7 +3212,6 @@ hclge_handle_error_type_reg_log(struct hclge_dev *hdev, 
	struct device *dev = &hdev->pdev->dev;

	u8 index_module = MODULE_NONE;

	u8 index_type = NONE_ERROR;

	bool cause_by_vf = false;



	mod_id = mod_info->mod_id;

	type_id = type_reg_info->type_id & HCLGE_ERR_TYPE_MASK;
@@ -3233,7 +3230,6 @@ hclge_handle_error_type_reg_log(struct hclge_dev *hdev, 
	for (i = 0; i < total_type; i++) {

		if (type_id == hclge_hw_type_id_st[i].type_id) {

			index_type = i;

			cause_by_vf = hclge_hw_type_id_st[i].cause_by_vf;

			break;

		}

	}
@@ -3254,8 +3250,6 @@ hclge_handle_error_type_reg_log(struct hclge_dev *hdev, 


	if (hclge_hw_module_id_st[index_module].query_reg_info)

		hclge_hw_module_id_st[index_module].query_reg_info(hdev);



	return cause_by_vf;

}



static void hclge_handle_error_module_log(struct hnae3_ae_dev *ae_dev,
@@ -3266,7 +3260,6 @@ static void hclge_handle_error_module_log(struct hnae3_ae_dev *ae_dev, 
	struct device *dev = &hdev->pdev->dev;

	struct hclge_mod_err_info *mod_info;

	struct hclge_sum_err_info *sum_info;

	bool cause_by_vf = false;

	u8 mod_num, err_num, i;

	u32 offset = 0;
@@ -3295,16 +3288,12 @@ static void hclge_handle_error_module_log(struct hnae3_ae_dev *ae_dev, 


			type_reg_info = (struct hclge_type_reg_err_info *)

					    &buf[offset++];

			if (hclge_handle_error_type_reg_log(hdev, mod_info,

							    type_reg_info))

				cause_by_vf = true;

			hclge_handle_error_type_reg_log(dev, mod_info,

							type_reg_info);



			offset += type_reg_info->reg_num;

		}

	}



	if (hnae3_ae_dev_vf_fault_supported(hdev->ae_dev) && cause_by_vf)

		set_bit(HNAE3_VF_EXP_RESET, &ae_dev->hw_err_reset_req);

}



static int hclge_query_all_err_bd_num(struct hclge_dev *hdev, u32 *bd_num)
@@ -3396,95 +3385,3 @@ int hclge_handle_error_info_log(struct hnae3_ae_dev *ae_dev) 
out:

	return ret;

}
 


static bool hclge_reset_vf_in_bitmap(struct hclge_dev *hdev,

				     unsigned long *bitmap)

{

	struct hclge_vport *vport;

	bool exist_set = false;

	int func_id;

	int ret;



	func_id = find_first_bit(bitmap, HCLGE_VPORT_NUM);

	if (func_id == PF_VPORT_ID)

		return false;



	while (func_id != HCLGE_VPORT_NUM) {

		vport = hclge_get_vf_vport(hdev,

					   func_id - HCLGE_VF_VPORT_START_NUM);

		if (!vport) {

			dev_err(&hdev->pdev->dev, "invalid func id(%d)\n",

				func_id);

			return false;

		}



		dev_info(&hdev->pdev->dev, "do function %d recovery.", func_id);



		ret = hclge_reset_tqp(&vport->nic);

		if (ret) {

			dev_err(&hdev->pdev->dev,

				"failed to reset tqp, ret = %d.", ret);

			return false;

		}



		ret = hclge_func_reset_cmd(hdev, func_id);

		if (ret) {

			dev_err(&hdev->pdev->dev,

				"failed to reset func %d, ret = %d.",

				func_id, ret);

			return false;

		}



		exist_set = true;

		clear_bit(func_id, bitmap);

		func_id = find_first_bit(bitmap, HCLGE_VPORT_NUM);

	}



	return exist_set;

}



static void hclge_get_vf_fault_bitmap(struct hclge_desc *desc,

				      unsigned long *bitmap)

{

#define HCLGE_FIR_FAULT_BYTES	24

#define HCLGE_SEC_FAULT_BYTES	8



	u8 *buff;



	memcpy(bitmap, desc[0].data, HCLGE_FIR_FAULT_BYTES);

	buff = (u8 *)bitmap + HCLGE_FIR_FAULT_BYTES;

	memcpy(buff, desc[1].data, HCLGE_SEC_FAULT_BYTES);

}



int hclge_handle_vf_queue_err_ras(struct hclge_dev *hdev)

{

	unsigned long vf_fault_bitmap[BITS_TO_LONGS(HCLGE_VPORT_NUM)];

	struct hclge_desc desc[2];

	bool cause_by_vf = false;

	int ret;



	if (!hnae3_ae_dev_vf_fault_supported(hdev->ae_dev) ||

	    !test_and_clear_bit(HNAE3_VF_EXP_RESET,

				&hdev->ae_dev->hw_err_reset_req))

		return 0;



	hclge_comm_cmd_setup_basic_desc(&desc[0], HCLGE_OPC_GET_QUEUE_ERR_VF,

					true);

	desc[0].flag |= cpu_to_le16(HCLGE_COMM_CMD_FLAG_NEXT);

	hclge_comm_cmd_setup_basic_desc(&desc[1], HCLGE_OPC_GET_QUEUE_ERR_VF,

					true);



	ret = hclge_comm_cmd_send(&hdev->hw.hw, desc, 2);

	if (ret) {

		dev_err(&hdev->pdev->dev,

			"failed to get vf bitmap, ret = %d.\n", ret);

		return ret;

	}

	hclge_get_vf_fault_bitmap(desc, vf_fault_bitmap);



	cause_by_vf = hclge_reset_vf_in_bitmap(hdev, vf_fault_bitmap);

	if (cause_by_vf)

		hdev->ae_dev->hw_err_reset_req = 0;



	return 0;

}

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h

+0 −2
Original line number Diff line number Diff line
@@ -220,7 +220,6 @@ struct hclge_hw_module_id { 
struct hclge_hw_type_id {

	enum hclge_err_type_list type_id;

	const char *msg;

	bool cause_by_vf; /* indicate the error may from vf exception */

};



struct hclge_sum_err_info {
@@ -275,5 +274,4 @@ int hclge_handle_hw_msix_error(struct hclge_dev *hdev, 
			       unsigned long *reset_requests);

int hclge_handle_error_info_log(struct hnae3_ae_dev *ae_dev);

int hclge_handle_mac_tnl(struct hclge_dev *hdev);

int hclge_handle_vf_queue_err_ras(struct hclge_dev *hdev);

#endif

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c

+1 −2
Original line number Diff line number Diff line
@@ -3391,7 +3391,7 @@ static int hclge_get_status(struct hnae3_handle *handle) 
	return hdev->hw.mac.link;

}



struct hclge_vport *hclge_get_vf_vport(struct hclge_dev *hdev, int vf)

static struct hclge_vport *hclge_get_vf_vport(struct hclge_dev *hdev, int vf)

{

	if (!pci_num_vf(hdev->pdev)) {

		dev_err(&hdev->pdev->dev,
@@ -4515,7 +4515,6 @@ static void hclge_handle_err_recovery(struct hclge_dev *hdev) 
	if (hclge_find_error_source(hdev)) {

		hclge_handle_error_info_log(ae_dev);

		hclge_handle_mac_tnl(hdev);

		hclge_handle_vf_queue_err_ras(hdev);

	}



	hclge_handle_err_reset_request(hdev);