Commit 6f1c646d authored by Stefan Eichenberger's avatar Stefan Eichenberger Committed by Paolo Abeni
Browse files

net: phy: add registers to support 1000BASE-T1 



Add registers and definitions to support 1000BASE-T1. This includes the
PCS Control and Status registers (3.2304 and 3.2305) as well as some
missing bits on the PMA/PMD extended ability register (1.18) and PMA/PMD
CTRL (1.2100) register.

Signed-off-by: default avatarStefan Eichenberger <eichest@gmail.com>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarPaolo Abeni <pabeni@redhat.com>
parent cf3e913b

include/uapi/linux/mdio.h

+17 −1
Original line number Diff line number Diff line
@@ -82,6 +82,8 @@ 
#define MDIO_AN_10BT1_AN_CTRL	526	/* 10BASE-T1 AN control register */

#define MDIO_AN_10BT1_AN_STAT	527	/* 10BASE-T1 AN status register */

#define MDIO_PMA_PMD_BT1_CTRL	2100	/* BASE-T1 PMA/PMD control register */

#define MDIO_PCS_1000BT1_CTRL	2304	/* 1000BASE-T1 PCS control register */

#define MDIO_PCS_1000BT1_STAT	2305	/* 1000BASE-T1 PCS status register */



/* LASI (Link Alarm Status Interrupt) registers, defined by XENPAK MSA. */

#define MDIO_PMA_LASI_RXCTRL	0x9000	/* RX_ALARM control */
@@ -332,6 +334,8 @@ 
#define MDIO_PCS_10T1L_CTRL_RESET	0x8000	/* PCS reset */



/* BASE-T1 PMA/PMD extended ability register. */

#define MDIO_PMA_PMD_BT1_B100_ABLE	0x0001	/* 100BASE-T1 Ability */

#define MDIO_PMA_PMD_BT1_B1000_ABLE	0x0002	/* 1000BASE-T1 Ability */

#define MDIO_PMA_PMD_BT1_B10L_ABLE	0x0004	/* 10BASE-T1L Ability */



/* BASE-T1 auto-negotiation advertisement register [15:0] */
@@ -373,8 +377,20 @@ 
#define MDIO_AN_10BT1_AN_STAT_LPA_EEE_T1L	0x4000 /* 10BASE-T1L LP EEE ability advertisement */



/* BASE-T1 PMA/PMD control register */

#define MDIO_PMA_PMD_BT1_CTRL_STRAP		0x000F /* Type selection (Strap) */

#define MDIO_PMA_PMD_BT1_CTRL_STRAP_B1000	0x0001 /* Select 1000BASE-T1 */

#define MDIO_PMA_PMD_BT1_CTRL_CFG_MST		0x4000 /* MASTER-SLAVE config value */



/* 1000BASE-T1 PCS control register */

#define MDIO_PCS_1000BT1_CTRL_LOW_POWER		0x0800 /* Low power mode */

#define MDIO_PCS_1000BT1_CTRL_DISABLE_TX	0x4000 /* Global PMA transmit disable */

#define MDIO_PCS_1000BT1_CTRL_RESET		0x8000 /* Software reset value */



/* 1000BASE-T1 PCS status register */

#define MDIO_PCS_1000BT1_STAT_LINK	0x0004 /* PCS Link is up */

#define MDIO_PCS_1000BT1_STAT_FAULT	0x0080 /* There is a fault condition */





/* EEE Supported/Advertisement/LP Advertisement registers.

 *

 * EEE capability Register (3.20), Advertisement (7.60) and