Commit 6ee0d3a9 authored by Amit Cohen's avatar Amit Cohen Committed by Jakub Kicinski
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mlxsw: core: Define latency TLV fields



The next patch will add support for latency TLV as part of EMAD (Ethernet
Management Datagrams) packets. As preparation, add the relevant fields.

Signed-off-by: default avatarDanielle Ratson <danieller@nvidia.com>
Signed-off-by: default avatarAmit Cohen <amcohen@nvidia.com>
Reviewed-by: default avatarIdo Schimmel <idosch@nvidia.com>
Signed-off-by: default avatarPetr Machata <petrm@nvidia.com>
Reviewed-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 695f7306
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+16 −0
Original line number Diff line number Diff line
@@ -378,6 +378,22 @@ MLXSW_ITEM32(emad, string_tlv, len, 0x00, 16, 11);
MLXSW_ITEM_BUF(emad, string_tlv, string, 0x04,
	       MLXSW_EMAD_STRING_TLV_STRING_LEN);

/* emad_latency_tlv_type
 * Type of the TLV.
 * Must be set to 0x4 (latency TLV).
 */
MLXSW_ITEM32(emad, latency_tlv, type, 0x00, 27, 5);

/* emad_latency_tlv_len
 * Length of the latency TLV in u32.
 */
MLXSW_ITEM32(emad, latency_tlv, len, 0x00, 16, 11);

/* emad_latency_tlv_latency_time
 * EMAD latency time in units of uSec.
 */
MLXSW_ITEM32(emad, latency_tlv, latency_time, 0x04, 0, 32);

/* emad_reg_tlv_type
 * Type of the TLV.
 * Must be set to 0x3 (register TLV).