Commit 6e889b1c authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Define more pipe timestamp registers 



Add definitions for various pipe timestamp registers:
- frame timestamp (last start of vblank) (g4x+), already had this defined
- flip timestamp (when SURF was last written) (g4x+)
- flipdone timestamp (when last flipdone was signalled) (tgl+)

Note that on pre-tgl the flip related timestamps are only updated
for primary plane flips, but on tgl+ we can select which plane
updates them (via PIPE_MISC2). Let's define those related bits
as well.

Curiously VLV/CHV do not have the frame/flip timestamp registers,
despite all the other related registers being inherited from g4x.
This means we can get rid of the pipe_offsets[] usage for these,
and thus the implicit dev_priv is gone as well.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230314130255.23273-4-ville.syrjala@linux.intel.com


Reviewed-by: default avatarJouni Högander <jouni.hogander@intel.com>
parent c640f6c5

drivers/gpu/drm/i915/i915_reg.h

+17 −1
Original line number Diff line number Diff line
@@ -3526,6 +3526,8 @@ 
#define   PIPE_MISC2_BUBBLE_COUNTER_MASK	REG_GENMASK(31, 24)

#define   PIPE_MISC2_BUBBLE_COUNTER_SCALER_EN	REG_FIELD_PREP(PIPE_MISC2_BUBBLE_COUNTER_MASK, 80)

#define   PIPE_MISC2_BUBBLE_COUNTER_SCALER_DIS	REG_FIELD_PREP(PIPE_MISC2_BUBBLE_COUNTER_MASK, 20)

#define   PIPE_MISC2_FLIP_INFO_PLANE_SEL_MASK		REG_GENMASK(2, 0) /* tgl+ */

#define   PIPE_MISC2_FLIP_INFO_PLANE_SEL(plane_id)	REG_FIELD_PREP(PIPE_MISC2_FLIP_INFO_PLANE_SEL_MASK, (plane_id))

#define PIPE_MISC2(pipe)		_MMIO_PIPE(pipe, _PIPE_MISC2_A, _PIPE_MISC2_B)



/* Skylake+ pipe bottom (background) color */
@@ -7554,9 +7556,23 @@ enum skl_power_gate { 
#define  GEN9_TIMESTAMP_OVERRIDE_US_COUNTER_DENOMINATOR_SHIFT	12

#define  GEN9_TIMESTAMP_OVERRIDE_US_COUNTER_DENOMINATOR_MASK	(0xf << 12)



/* g4x+, except vlv/chv! */

#define _PIPE_FRMTMSTMP_A		0x70048

#define _PIPE_FRMTMSTMP_B		0x71048

#define PIPE_FRMTMSTMP(pipe)		\

			_MMIO_PIPE2(pipe, _PIPE_FRMTMSTMP_A)

	_MMIO_PIPE(pipe, _PIPE_FRMTMSTMP_A, _PIPE_FRMTMSTMP_B)



/* g4x+, except vlv/chv! */

#define _PIPE_FLIPTMSTMP_A		0x7004C

#define _PIPE_FLIPTMSTMP_B		0x7104C

#define PIPE_FLIPTMSTMP(pipe)		\

	_MMIO_PIPE(pipe, _PIPE_FLIPTMSTMP_A, _PIPE_FLIPTMSTMP_B)



/* tgl+ */

#define _PIPE_FLIPDONETMSTMP_A		0x70054

#define _PIPE_FLIPDONETMSTMP_B		0x71054

#define PIPE_FLIPDONETIMSTMP(pipe)	\

	_MMIO_PIPE(pipe, _PIPE_FLIPDONETMSTMP_A, _PIPE_FLIPDONETMSTMP_B)



#define GGC				_MMIO(0x108040)

#define   GMS_MASK			REG_GENMASK(15, 8)