Commit 6e87c422 authored by Alex Sierra's avatar Alex Sierra Committed by Alex Deucher
Browse files

drm/amdgpu: improve wait logic at fence polling 



Accomplish this by reading the seq number right away instead of sleep
for 5us. There are certain cases where the fence is ready almost
immediately. Sleep number granularity was also reduced as the majority
of the kiq tlb flush takes between 2us to 6us.

Signed-off-by: default avatarAlex Sierra <alex.sierra@amd.com>
Acked-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 17d62410

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

+4 −7
Original line number Diff line number Diff line
@@ -376,14 +376,11 @@ signed long amdgpu_fence_wait_polling(struct amdgpu_ring *ring, 
				      uint32_t wait_seq,

				      signed long timeout)

{

	uint32_t seq;



	do {

		seq = amdgpu_fence_read(ring);

		udelay(5);

		timeout -= 5;

	} while ((int32_t)(wait_seq - seq) > 0 && timeout > 0);



	while ((int32_t)(wait_seq - amdgpu_fence_read(ring)) > 0 && timeout > 0) {

		udelay(2);

		timeout -= 2;

	}

	return timeout > 0 ? timeout : 0;

}

/**