Commit 6e4e9fbd authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915/gt: drop dependency on VLV_DISPLAY_BASE 



CHV_FUSE_GT (0x182168) is purely about GT fuses, therefore belongs in
intel_gt_regs.h, is in the gcfgmmio unit, but is technically in the VLV
display base area.

Add VLV_GUNIT_BASE to drop dependency on VLV_DISPLAY_BASE and thus
display/intel_display_reg_defs.h in intel_gt_regs.h.

v2: Add VLV_GUNIT_BASE (Ville)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230511152153.986676-1-jani.nikula@intel.com
parent 685282a3

drivers/gpu/drm/i915/gt/intel_gt_regs.h

+3 −2
Original line number Diff line number Diff line
@@ -7,7 +7,8 @@ 
#define __INTEL_GT_REGS__



#include "i915_reg_defs.h"

#include "display/intel_display_reg_defs.h"	/* VLV_DISPLAY_BASE */



#define VLV_GUNIT_BASE			0x180000



/*

 * The perf control registers are technically multicast registers, but the
@@ -1450,7 +1451,7 @@ 
#define GEN12_RCU_MODE				_MMIO(0x14800)

#define   GEN12_RCU_MODE_CCS_ENABLE		REG_BIT(0)



#define CHV_FUSE_GT				_MMIO(VLV_DISPLAY_BASE + 0x2168)

#define CHV_FUSE_GT				_MMIO(VLV_GUNIT_BASE + 0x2168)

#define   CHV_FGT_DISABLE_SS0			(1 << 10)

#define   CHV_FGT_DISABLE_SS1			(1 << 11)

#define   CHV_FGT_EU_DIS_SS0_R0_SHIFT		16