Commit 6de7f9c3 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: sm8550: add GPR and LPASS pin controller 



Add the ADSP GPR (Generic Packet Router) and LPASS LPI (Low Power Audio
SubSystem Low Power Island) pin controller nodes used as part of audio
subsystem on SM8550.

Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
[bjorn: Shortened stream mask, per Konrad's request]
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230206150744.513967-1-krzysztof.kozlowski@linaro.org
parent f816cda0

arch/arm64/boot/dts/qcom/sm8550.dtsi

+55 −0
Original line number Diff line number Diff line
@@ -13,7 +13,9 @@ 
#include <dt-bindings/interconnect/qcom,sm8550-rpmh.h>

#include <dt-bindings/mailbox/qcom-ipcc.h>

#include <dt-bindings/power/qcom-rpmpd.h>

#include <dt-bindings/soc/qcom,gpr.h>

#include <dt-bindings/soc/qcom,rpmh-rsc.h>

#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>

#include <dt-bindings/phy/phy-qcom-qmp.h>

#include <dt-bindings/thermal/thermal.h>
@@ -1996,6 +1998,19 @@ 
			};

		};



		lpass_tlmm: pinctrl@6e80000 {

			compatible = "qcom,sm8550-lpass-lpi-pinctrl";

			reg = <0 0x06e80000 0 0x20000>,

			      <0 0x0725a000 0 0x10000>;

			gpio-controller;

			#gpio-cells = <2>;

			gpio-ranges = <&lpass_tlmm 0 0 23>;



			clocks = <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,

				 <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;

			clock-names = "core", "audio";

		};



		lpass_lpiaon_noc: interconnect@7400000 {

			compatible = "qcom,sm8550-lpass-lpiaon-noc";

			reg = <0 0x07400000 0 0x19080>;
@@ -3513,6 +3528,46 @@ 
							 <&apps_smmu 0x1067 0x0>;

					};

				};



				gpr {

					compatible = "qcom,gpr";

					qcom,glink-channels = "adsp_apps";

					qcom,domain = <GPR_DOMAIN_ID_ADSP>;

					qcom,intents = <512 20>;

					#address-cells = <1>;

					#size-cells = <0>;



					q6apm: service@1 {

						compatible = "qcom,q6apm";

						reg = <GPR_APM_MODULE_IID>;

						#sound-dai-cells = <0>;

						qcom,protection-domain = "avs/audio",

									 "msm/adsp/audio_pd";



						q6apmdai: dais {

							compatible = "qcom,q6apm-dais";

							iommus = <&apps_smmu 0x1001 0x80>,

								 <&apps_smmu 0x1061 0x0>;

						};



						q6apmbedai: bedais {

							compatible = "qcom,q6apm-lpass-dais";

							#sound-dai-cells = <1>;

						};

					};



					q6prm: service@2 {

						compatible = "qcom,q6prm";

						reg = <GPR_PRM_MODULE_IID>;

						qcom,protection-domain = "avs/audio",

									 "msm/adsp/audio_pd";



						q6prmcc: clock-controller {

							compatible = "qcom,q6prm-lpass-clocks";

							#clock-cells = <2>;

						};

					};

				};

			};

		};