Loading arch/arm/mach-mx5/Makefile +0 −1 Original line number Diff line number Diff line Loading @@ -4,7 +4,6 @@ # Object file lists. obj-y := cpu.o mm.o clock-mx51-mx53.o ehci.o system.o obj-$(CONFIG_SOC_IMX50) += mm-mx50.o obj-$(CONFIG_PM) += pm-imx5.o obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o Loading arch/arm/mach-mx5/mm-mx50.cdeleted 100644 → 0 +0 −72 Original line number Diff line number Diff line /* * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * You should have received a copy of the GNU General Public License along * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * * Create static mapping between physical to virtual memory. */ #include <linux/mm.h> #include <linux/init.h> #include <asm/mach/map.h> #include <mach/hardware.h> #include <mach/common.h> #include <mach/iomux-v3.h> #include <mach/irqs.h> /* * Define the MX50 memory map. */ static struct map_desc mx50_io_desc[] __initdata = { imx_map_entry(MX50, TZIC, MT_DEVICE), imx_map_entry(MX50, SPBA0, MT_DEVICE), imx_map_entry(MX50, AIPS1, MT_DEVICE), imx_map_entry(MX50, AIPS2, MT_DEVICE), }; /* * This function initializes the memory map. It is called during the * system startup to create static physical to virtual memory mappings * for the IO modules. */ void __init mx50_map_io(void) { iotable_init(mx50_io_desc, ARRAY_SIZE(mx50_io_desc)); } void __init imx50_init_early(void) { mxc_set_cpu_type(MXC_CPU_MX50); mxc_iomux_v3_init(MX50_IO_ADDRESS(MX50_IOMUXC_BASE_ADDR)); mxc_arch_reset_init(MX50_IO_ADDRESS(MX50_WDOG_BASE_ADDR)); } void __init mx50_init_irq(void) { tzic_init_irq(MX50_IO_ADDRESS(MX50_TZIC_BASE_ADDR)); } void __init imx50_soc_init(void) { /* i.mx50 has the i.mx31 type gpio */ mxc_register_gpio("imx31-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH); mxc_register_gpio("imx31-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH); mxc_register_gpio("imx31-gpio", 2, MX50_GPIO3_BASE_ADDR, SZ_16K, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH); mxc_register_gpio("imx31-gpio", 3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH); mxc_register_gpio("imx31-gpio", 4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH); mxc_register_gpio("imx31-gpio", 5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH); } arch/arm/mach-mx5/mm.c +47 −29 Original line number Diff line number Diff line Loading @@ -21,12 +21,22 @@ #include <mach/devices-common.h> #include <mach/iomux-v3.h> /* * Define the MX50 memory map. */ static struct map_desc mx50_io_desc[] __initdata = { imx_map_entry(MX50, TZIC, MT_DEVICE), imx_map_entry(MX50, SPBA0, MT_DEVICE), imx_map_entry(MX50, AIPS1, MT_DEVICE), imx_map_entry(MX50, AIPS2, MT_DEVICE), }; /* * Define the MX51 memory map. */ static struct map_desc mx51_io_desc[] __initdata = { imx_map_entry(MX51, TZIC, MT_DEVICE), imx_map_entry(MX51, IRAM, MT_DEVICE), imx_map_entry(MX51, DEBUG, MT_DEVICE), imx_map_entry(MX51, AIPS1, MT_DEVICE), imx_map_entry(MX51, SPBA0, MT_DEVICE), imx_map_entry(MX51, AIPS2, MT_DEVICE), Loading @@ -36,6 +46,7 @@ static struct map_desc mx51_io_desc[] __initdata = { * Define the MX53 memory map. */ static struct map_desc mx53_io_desc[] __initdata = { imx_map_entry(MX53, TZIC, MT_DEVICE), imx_map_entry(MX53, AIPS1, MT_DEVICE), imx_map_entry(MX53, SPBA0, MT_DEVICE), imx_map_entry(MX53, AIPS2, MT_DEVICE), Loading @@ -46,11 +57,28 @@ static struct map_desc mx53_io_desc[] __initdata = { * system startup to create static physical to virtual memory mappings * for the IO modules. */ void __init mx50_map_io(void) { iotable_init(mx50_io_desc, ARRAY_SIZE(mx50_io_desc)); } void __init mx51_map_io(void) { iotable_init(mx51_io_desc, ARRAY_SIZE(mx51_io_desc)); } void __init mx53_map_io(void) { iotable_init(mx53_io_desc, ARRAY_SIZE(mx53_io_desc)); } void __init imx50_init_early(void) { mxc_set_cpu_type(MXC_CPU_MX50); mxc_iomux_v3_init(MX50_IO_ADDRESS(MX50_IOMUXC_BASE_ADDR)); mxc_arch_reset_init(MX50_IO_ADDRESS(MX50_WDOG_BASE_ADDR)); } void __init imx51_init_early(void) { mxc_set_cpu_type(MXC_CPU_MX51); Loading @@ -58,11 +86,6 @@ void __init imx51_init_early(void) mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR)); } void __init mx53_map_io(void) { iotable_init(mx53_io_desc, ARRAY_SIZE(mx53_io_desc)); } void __init imx53_init_early(void) { mxc_set_cpu_type(MXC_CPU_MX53); Loading @@ -70,35 +93,19 @@ void __init imx53_init_early(void) mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG1_BASE_ADDR)); } void __init mx51_init_irq(void) void __init mx50_init_irq(void) { unsigned long tzic_addr; void __iomem *tzic_virt; if (mx51_revision() < IMX_CHIP_REVISION_2_0) tzic_addr = MX51_TZIC_BASE_ADDR_TO1; else tzic_addr = MX51_TZIC_BASE_ADDR; tzic_virt = ioremap(tzic_addr, SZ_16K); if (!tzic_virt) panic("unable to map TZIC interrupt controller\n"); tzic_init_irq(MX50_IO_ADDRESS(MX50_TZIC_BASE_ADDR)); } tzic_init_irq(tzic_virt); void __init mx51_init_irq(void) { tzic_init_irq(MX51_IO_ADDRESS(MX51_TZIC_BASE_ADDR)); } void __init mx53_init_irq(void) { unsigned long tzic_addr; void __iomem *tzic_virt; tzic_addr = MX53_TZIC_BASE_ADDR; tzic_virt = ioremap(tzic_addr, SZ_16K); if (!tzic_virt) panic("unable to map TZIC interrupt controller\n"); tzic_init_irq(tzic_virt); tzic_init_irq(MX53_IO_ADDRESS(MX53_TZIC_BASE_ADDR)); } static struct sdma_script_start_addrs imx51_sdma_script __initdata = { Loading Loading @@ -138,6 +145,17 @@ static struct sdma_platform_data imx53_sdma_pdata __initdata = { .script_addrs = &imx53_sdma_script, }; void __init imx50_soc_init(void) { /* i.mx50 has the i.mx31 type gpio */ mxc_register_gpio("imx31-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH); mxc_register_gpio("imx31-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH); mxc_register_gpio("imx31-gpio", 2, MX50_GPIO3_BASE_ADDR, SZ_16K, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH); mxc_register_gpio("imx31-gpio", 3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH); mxc_register_gpio("imx31-gpio", 4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH); mxc_register_gpio("imx31-gpio", 5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH); } void __init imx51_soc_init(void) { /* i.mx51 has the i.mx31 type gpio */ Loading arch/arm/mach-mxs/mach-mx28evk.c +11 −12 Original line number Diff line number Diff line Loading @@ -351,6 +351,11 @@ static struct mxs_mmc_platform_data mx28evk_mmc_pdata[] __initdata = { }, }; static struct gpio mx28evk_lcd_gpios[] = { { MX28EVK_LCD_ENABLE, GPIOF_OUT_INIT_HIGH, "lcd-enable" }, { MX28EVK_BL_ENABLE, GPIOF_OUT_INIT_HIGH, "bl-enable" }, }; static void __init mx28evk_init(void) { int ret; Loading @@ -377,18 +382,11 @@ static void __init mx28evk_init(void) mx28_add_flexcan(1, &mx28evk_flexcan_pdata[1]); } ret = gpio_request_one(MX28EVK_LCD_ENABLE, GPIOF_DIR_OUT, "lcd-enable"); ret = gpio_request_array(mx28evk_lcd_gpios, ARRAY_SIZE(mx28evk_lcd_gpios)); if (ret) pr_warn("failed to request gpio lcd-enable: %d\n", ret); pr_warn("failed to request gpio pins for lcd: %d\n", ret); else gpio_set_value(MX28EVK_LCD_ENABLE, 1); ret = gpio_request_one(MX28EVK_BL_ENABLE, GPIOF_DIR_OUT, "bl-enable"); if (ret) pr_warn("failed to request gpio bl-enable: %d\n", ret); else gpio_set_value(MX28EVK_BL_ENABLE, 1); mx28_add_mxsfb(&mx28evk_mxsfb_pdata); /* power on mmc slot by writing 0 to the gpio */ Loading @@ -402,6 +400,7 @@ static void __init mx28evk_init(void) "mmc1-slot-power"); if (ret) pr_warn("failed to request gpio mmc1-slot-power: %d\n", ret); else mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]); gpio_led_register_device(0, &mx28evk_led_data); Loading arch/arm/plat-mxc/include/mach/hardware.h +6 −1 Original line number Diff line number Diff line Loading @@ -81,11 +81,16 @@ * AIPS1 0x53f00000+0x100000 -> 0xf5700000+0x100000 * AIPS2 0x63f00000+0x100000 -> 0xf5300000+0x100000 * mx51: * TZIC 0xe0000000+0x004000 -> 0xf5000000+0x004000 * IRAM 0x1ffe0000+0x020000 -> 0xf4fe0000+0x020000 * DEBUG 0x60000000+0x100000 -> 0xf5000000+0x100000 * SPBA0 0x70000000+0x100000 -> 0xf5400000+0x100000 * AIPS1 0x73f00000+0x100000 -> 0xf5700000+0x100000 * AIPS2 0x83f00000+0x100000 -> 0xf4300000+0x100000 * mx53: * TZIC 0x0fffc000+0x004000 -> 0xf4bfc000+0x004000 * SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000 * AIPS1 0x53f00000+0x100000 -> 0xf5700000+0x100000 * AIPS2 0x63f00000+0x100000 -> 0xf5300000+0x100000 */ #define IMX_IO_P2V(x) ( \ 0xf4000000 + \ Loading Loading
arch/arm/mach-mx5/Makefile +0 −1 Original line number Diff line number Diff line Loading @@ -4,7 +4,6 @@ # Object file lists. obj-y := cpu.o mm.o clock-mx51-mx53.o ehci.o system.o obj-$(CONFIG_SOC_IMX50) += mm-mx50.o obj-$(CONFIG_PM) += pm-imx5.o obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o Loading
arch/arm/mach-mx5/mm-mx50.cdeleted 100644 → 0 +0 −72 Original line number Diff line number Diff line /* * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * You should have received a copy of the GNU General Public License along * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * * Create static mapping between physical to virtual memory. */ #include <linux/mm.h> #include <linux/init.h> #include <asm/mach/map.h> #include <mach/hardware.h> #include <mach/common.h> #include <mach/iomux-v3.h> #include <mach/irqs.h> /* * Define the MX50 memory map. */ static struct map_desc mx50_io_desc[] __initdata = { imx_map_entry(MX50, TZIC, MT_DEVICE), imx_map_entry(MX50, SPBA0, MT_DEVICE), imx_map_entry(MX50, AIPS1, MT_DEVICE), imx_map_entry(MX50, AIPS2, MT_DEVICE), }; /* * This function initializes the memory map. It is called during the * system startup to create static physical to virtual memory mappings * for the IO modules. */ void __init mx50_map_io(void) { iotable_init(mx50_io_desc, ARRAY_SIZE(mx50_io_desc)); } void __init imx50_init_early(void) { mxc_set_cpu_type(MXC_CPU_MX50); mxc_iomux_v3_init(MX50_IO_ADDRESS(MX50_IOMUXC_BASE_ADDR)); mxc_arch_reset_init(MX50_IO_ADDRESS(MX50_WDOG_BASE_ADDR)); } void __init mx50_init_irq(void) { tzic_init_irq(MX50_IO_ADDRESS(MX50_TZIC_BASE_ADDR)); } void __init imx50_soc_init(void) { /* i.mx50 has the i.mx31 type gpio */ mxc_register_gpio("imx31-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH); mxc_register_gpio("imx31-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH); mxc_register_gpio("imx31-gpio", 2, MX50_GPIO3_BASE_ADDR, SZ_16K, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH); mxc_register_gpio("imx31-gpio", 3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH); mxc_register_gpio("imx31-gpio", 4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH); mxc_register_gpio("imx31-gpio", 5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH); }
arch/arm/mach-mx5/mm.c +47 −29 Original line number Diff line number Diff line Loading @@ -21,12 +21,22 @@ #include <mach/devices-common.h> #include <mach/iomux-v3.h> /* * Define the MX50 memory map. */ static struct map_desc mx50_io_desc[] __initdata = { imx_map_entry(MX50, TZIC, MT_DEVICE), imx_map_entry(MX50, SPBA0, MT_DEVICE), imx_map_entry(MX50, AIPS1, MT_DEVICE), imx_map_entry(MX50, AIPS2, MT_DEVICE), }; /* * Define the MX51 memory map. */ static struct map_desc mx51_io_desc[] __initdata = { imx_map_entry(MX51, TZIC, MT_DEVICE), imx_map_entry(MX51, IRAM, MT_DEVICE), imx_map_entry(MX51, DEBUG, MT_DEVICE), imx_map_entry(MX51, AIPS1, MT_DEVICE), imx_map_entry(MX51, SPBA0, MT_DEVICE), imx_map_entry(MX51, AIPS2, MT_DEVICE), Loading @@ -36,6 +46,7 @@ static struct map_desc mx51_io_desc[] __initdata = { * Define the MX53 memory map. */ static struct map_desc mx53_io_desc[] __initdata = { imx_map_entry(MX53, TZIC, MT_DEVICE), imx_map_entry(MX53, AIPS1, MT_DEVICE), imx_map_entry(MX53, SPBA0, MT_DEVICE), imx_map_entry(MX53, AIPS2, MT_DEVICE), Loading @@ -46,11 +57,28 @@ static struct map_desc mx53_io_desc[] __initdata = { * system startup to create static physical to virtual memory mappings * for the IO modules. */ void __init mx50_map_io(void) { iotable_init(mx50_io_desc, ARRAY_SIZE(mx50_io_desc)); } void __init mx51_map_io(void) { iotable_init(mx51_io_desc, ARRAY_SIZE(mx51_io_desc)); } void __init mx53_map_io(void) { iotable_init(mx53_io_desc, ARRAY_SIZE(mx53_io_desc)); } void __init imx50_init_early(void) { mxc_set_cpu_type(MXC_CPU_MX50); mxc_iomux_v3_init(MX50_IO_ADDRESS(MX50_IOMUXC_BASE_ADDR)); mxc_arch_reset_init(MX50_IO_ADDRESS(MX50_WDOG_BASE_ADDR)); } void __init imx51_init_early(void) { mxc_set_cpu_type(MXC_CPU_MX51); Loading @@ -58,11 +86,6 @@ void __init imx51_init_early(void) mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR)); } void __init mx53_map_io(void) { iotable_init(mx53_io_desc, ARRAY_SIZE(mx53_io_desc)); } void __init imx53_init_early(void) { mxc_set_cpu_type(MXC_CPU_MX53); Loading @@ -70,35 +93,19 @@ void __init imx53_init_early(void) mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG1_BASE_ADDR)); } void __init mx51_init_irq(void) void __init mx50_init_irq(void) { unsigned long tzic_addr; void __iomem *tzic_virt; if (mx51_revision() < IMX_CHIP_REVISION_2_0) tzic_addr = MX51_TZIC_BASE_ADDR_TO1; else tzic_addr = MX51_TZIC_BASE_ADDR; tzic_virt = ioremap(tzic_addr, SZ_16K); if (!tzic_virt) panic("unable to map TZIC interrupt controller\n"); tzic_init_irq(MX50_IO_ADDRESS(MX50_TZIC_BASE_ADDR)); } tzic_init_irq(tzic_virt); void __init mx51_init_irq(void) { tzic_init_irq(MX51_IO_ADDRESS(MX51_TZIC_BASE_ADDR)); } void __init mx53_init_irq(void) { unsigned long tzic_addr; void __iomem *tzic_virt; tzic_addr = MX53_TZIC_BASE_ADDR; tzic_virt = ioremap(tzic_addr, SZ_16K); if (!tzic_virt) panic("unable to map TZIC interrupt controller\n"); tzic_init_irq(tzic_virt); tzic_init_irq(MX53_IO_ADDRESS(MX53_TZIC_BASE_ADDR)); } static struct sdma_script_start_addrs imx51_sdma_script __initdata = { Loading Loading @@ -138,6 +145,17 @@ static struct sdma_platform_data imx53_sdma_pdata __initdata = { .script_addrs = &imx53_sdma_script, }; void __init imx50_soc_init(void) { /* i.mx50 has the i.mx31 type gpio */ mxc_register_gpio("imx31-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH); mxc_register_gpio("imx31-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH); mxc_register_gpio("imx31-gpio", 2, MX50_GPIO3_BASE_ADDR, SZ_16K, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH); mxc_register_gpio("imx31-gpio", 3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH); mxc_register_gpio("imx31-gpio", 4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH); mxc_register_gpio("imx31-gpio", 5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH); } void __init imx51_soc_init(void) { /* i.mx51 has the i.mx31 type gpio */ Loading
arch/arm/mach-mxs/mach-mx28evk.c +11 −12 Original line number Diff line number Diff line Loading @@ -351,6 +351,11 @@ static struct mxs_mmc_platform_data mx28evk_mmc_pdata[] __initdata = { }, }; static struct gpio mx28evk_lcd_gpios[] = { { MX28EVK_LCD_ENABLE, GPIOF_OUT_INIT_HIGH, "lcd-enable" }, { MX28EVK_BL_ENABLE, GPIOF_OUT_INIT_HIGH, "bl-enable" }, }; static void __init mx28evk_init(void) { int ret; Loading @@ -377,18 +382,11 @@ static void __init mx28evk_init(void) mx28_add_flexcan(1, &mx28evk_flexcan_pdata[1]); } ret = gpio_request_one(MX28EVK_LCD_ENABLE, GPIOF_DIR_OUT, "lcd-enable"); ret = gpio_request_array(mx28evk_lcd_gpios, ARRAY_SIZE(mx28evk_lcd_gpios)); if (ret) pr_warn("failed to request gpio lcd-enable: %d\n", ret); pr_warn("failed to request gpio pins for lcd: %d\n", ret); else gpio_set_value(MX28EVK_LCD_ENABLE, 1); ret = gpio_request_one(MX28EVK_BL_ENABLE, GPIOF_DIR_OUT, "bl-enable"); if (ret) pr_warn("failed to request gpio bl-enable: %d\n", ret); else gpio_set_value(MX28EVK_BL_ENABLE, 1); mx28_add_mxsfb(&mx28evk_mxsfb_pdata); /* power on mmc slot by writing 0 to the gpio */ Loading @@ -402,6 +400,7 @@ static void __init mx28evk_init(void) "mmc1-slot-power"); if (ret) pr_warn("failed to request gpio mmc1-slot-power: %d\n", ret); else mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]); gpio_led_register_device(0, &mx28evk_led_data); Loading
arch/arm/plat-mxc/include/mach/hardware.h +6 −1 Original line number Diff line number Diff line Loading @@ -81,11 +81,16 @@ * AIPS1 0x53f00000+0x100000 -> 0xf5700000+0x100000 * AIPS2 0x63f00000+0x100000 -> 0xf5300000+0x100000 * mx51: * TZIC 0xe0000000+0x004000 -> 0xf5000000+0x004000 * IRAM 0x1ffe0000+0x020000 -> 0xf4fe0000+0x020000 * DEBUG 0x60000000+0x100000 -> 0xf5000000+0x100000 * SPBA0 0x70000000+0x100000 -> 0xf5400000+0x100000 * AIPS1 0x73f00000+0x100000 -> 0xf5700000+0x100000 * AIPS2 0x83f00000+0x100000 -> 0xf4300000+0x100000 * mx53: * TZIC 0x0fffc000+0x004000 -> 0xf4bfc000+0x004000 * SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000 * AIPS1 0x53f00000+0x100000 -> 0xf5700000+0x100000 * AIPS2 0x63f00000+0x100000 -> 0xf5300000+0x100000 */ #define IMX_IO_P2V(x) ( \ 0xf4000000 + \ Loading