Loading drivers/iio/adc/mt6577_auxadc.c +41 −13 Original line number Diff line number Diff line Loading @@ -42,10 +42,26 @@ #define MT6577_AUXADC_POWER_READY_MS 1 #define MT6577_AUXADC_SAMPLE_READY_US 25 struct mtk_auxadc_compatible { bool sample_data_cali; bool check_global_idle; }; struct mt6577_auxadc_device { void __iomem *reg_base; struct clk *adc_clk; struct mutex lock; const struct mtk_auxadc_compatible *dev_comp; }; static const struct mtk_auxadc_compatible mt8173_compat = { .sample_data_cali = false, .check_global_idle = true, }; static const struct mtk_auxadc_compatible mt6765_compat = { .sample_data_cali = true, .check_global_idle = false, }; #define MT6577_AUXADC_CHANNEL(idx) { \ Loading Loading @@ -74,6 +90,11 @@ static const struct iio_chan_spec mt6577_auxadc_iio_channels[] = { MT6577_AUXADC_CHANNEL(15), }; static int mt_auxadc_get_cali_data(int rawdata, bool enable_cali) { return rawdata; } static inline void mt6577_auxadc_mod_reg(void __iomem *reg, u32 or_mask, u32 and_mask) { Loading Loading @@ -120,9 +141,10 @@ static int mt6577_auxadc_read(struct iio_dev *indio_dev, /* we must delay here for hardware sample channel data */ udelay(MT6577_AUXADC_SAMPLE_READY_US); if (adc_dev->dev_comp->check_global_idle) { /* check MTK_AUXADC_CON2 if auxadc is idle */ ret = readl_poll_timeout(adc_dev->reg_base + MT6577_AUXADC_CON2, val, ((val & MT6577_AUXADC_STA) == 0), ret = readl_poll_timeout(adc_dev->reg_base + MT6577_AUXADC_CON2, val, ((val & MT6577_AUXADC_STA) == 0), MT6577_AUXADC_SLEEP_US, MT6577_AUXADC_TIMEOUT_US); if (ret < 0) { Loading @@ -130,6 +152,7 @@ static int mt6577_auxadc_read(struct iio_dev *indio_dev, "wait for auxadc idle time out\n"); goto err_timeout; } } /* read channel and make sure ready bit == 1 */ ret = readl_poll_timeout(reg_channel, val, Loading Loading @@ -163,6 +186,8 @@ static int mt6577_auxadc_read_raw(struct iio_dev *indio_dev, int *val2, long info) { struct mt6577_auxadc_device *adc_dev = iio_priv(indio_dev); switch (info) { case IIO_CHAN_INFO_PROCESSED: *val = mt6577_auxadc_read(indio_dev, chan); Loading @@ -172,6 +197,8 @@ static int mt6577_auxadc_read_raw(struct iio_dev *indio_dev, chan->channel); return *val; } if (adc_dev->dev_comp->sample_data_cali) *val = mt_auxadc_get_cali_data(*val, true); return IIO_VAL_INT; default: Loading Loading @@ -304,10 +331,11 @@ static SIMPLE_DEV_PM_OPS(mt6577_auxadc_pm_ops, mt6577_auxadc_resume); static const struct of_device_id mt6577_auxadc_of_match[] = { { .compatible = "mediatek,mt2701-auxadc", }, { .compatible = "mediatek,mt2712-auxadc", }, { .compatible = "mediatek,mt7622-auxadc", }, { .compatible = "mediatek,mt8173-auxadc", }, { .compatible = "mediatek,mt2701-auxadc", .data = &mt8173_compat}, { .compatible = "mediatek,mt2712-auxadc", .data = &mt8173_compat}, { .compatible = "mediatek,mt7622-auxadc", .data = &mt8173_compat}, { .compatible = "mediatek,mt8173-auxadc", .data = &mt8173_compat}, { .compatible = "mediatek,mt6765-auxadc", .data = &mt6765_compat}, { } }; MODULE_DEVICE_TABLE(of, mt6577_auxadc_of_match); Loading Loading
drivers/iio/adc/mt6577_auxadc.c +41 −13 Original line number Diff line number Diff line Loading @@ -42,10 +42,26 @@ #define MT6577_AUXADC_POWER_READY_MS 1 #define MT6577_AUXADC_SAMPLE_READY_US 25 struct mtk_auxadc_compatible { bool sample_data_cali; bool check_global_idle; }; struct mt6577_auxadc_device { void __iomem *reg_base; struct clk *adc_clk; struct mutex lock; const struct mtk_auxadc_compatible *dev_comp; }; static const struct mtk_auxadc_compatible mt8173_compat = { .sample_data_cali = false, .check_global_idle = true, }; static const struct mtk_auxadc_compatible mt6765_compat = { .sample_data_cali = true, .check_global_idle = false, }; #define MT6577_AUXADC_CHANNEL(idx) { \ Loading Loading @@ -74,6 +90,11 @@ static const struct iio_chan_spec mt6577_auxadc_iio_channels[] = { MT6577_AUXADC_CHANNEL(15), }; static int mt_auxadc_get_cali_data(int rawdata, bool enable_cali) { return rawdata; } static inline void mt6577_auxadc_mod_reg(void __iomem *reg, u32 or_mask, u32 and_mask) { Loading Loading @@ -120,9 +141,10 @@ static int mt6577_auxadc_read(struct iio_dev *indio_dev, /* we must delay here for hardware sample channel data */ udelay(MT6577_AUXADC_SAMPLE_READY_US); if (adc_dev->dev_comp->check_global_idle) { /* check MTK_AUXADC_CON2 if auxadc is idle */ ret = readl_poll_timeout(adc_dev->reg_base + MT6577_AUXADC_CON2, val, ((val & MT6577_AUXADC_STA) == 0), ret = readl_poll_timeout(adc_dev->reg_base + MT6577_AUXADC_CON2, val, ((val & MT6577_AUXADC_STA) == 0), MT6577_AUXADC_SLEEP_US, MT6577_AUXADC_TIMEOUT_US); if (ret < 0) { Loading @@ -130,6 +152,7 @@ static int mt6577_auxadc_read(struct iio_dev *indio_dev, "wait for auxadc idle time out\n"); goto err_timeout; } } /* read channel and make sure ready bit == 1 */ ret = readl_poll_timeout(reg_channel, val, Loading Loading @@ -163,6 +186,8 @@ static int mt6577_auxadc_read_raw(struct iio_dev *indio_dev, int *val2, long info) { struct mt6577_auxadc_device *adc_dev = iio_priv(indio_dev); switch (info) { case IIO_CHAN_INFO_PROCESSED: *val = mt6577_auxadc_read(indio_dev, chan); Loading @@ -172,6 +197,8 @@ static int mt6577_auxadc_read_raw(struct iio_dev *indio_dev, chan->channel); return *val; } if (adc_dev->dev_comp->sample_data_cali) *val = mt_auxadc_get_cali_data(*val, true); return IIO_VAL_INT; default: Loading Loading @@ -304,10 +331,11 @@ static SIMPLE_DEV_PM_OPS(mt6577_auxadc_pm_ops, mt6577_auxadc_resume); static const struct of_device_id mt6577_auxadc_of_match[] = { { .compatible = "mediatek,mt2701-auxadc", }, { .compatible = "mediatek,mt2712-auxadc", }, { .compatible = "mediatek,mt7622-auxadc", }, { .compatible = "mediatek,mt8173-auxadc", }, { .compatible = "mediatek,mt2701-auxadc", .data = &mt8173_compat}, { .compatible = "mediatek,mt2712-auxadc", .data = &mt8173_compat}, { .compatible = "mediatek,mt7622-auxadc", .data = &mt8173_compat}, { .compatible = "mediatek,mt8173-auxadc", .data = &mt8173_compat}, { .compatible = "mediatek,mt6765-auxadc", .data = &mt6765_compat}, { } }; MODULE_DEVICE_TABLE(of, mt6577_auxadc_of_match); Loading