Unverified Commit 6d75dfc3 authored by Kuninori Morimoto's avatar Kuninori Morimoto Committed by Mark Brown
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ASoC: codecs: wm*: rename to snd_soc_component_read()



We need to use snd_soc_component_read()
instead of     snd_soc_component_read32()

This patch renames _read32() to _read()

Signed-off-by: default avatarKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87eeqf4mcl.wl-kuninori.morimoto.gx@renesas.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent e896c1ed
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+2 −2
Original line number Diff line number Diff line
@@ -2027,7 +2027,7 @@ static int wm2200_set_fll(struct snd_soc_component *component, int fll_id, int s
			msleep(1);
		}

		ret = snd_soc_component_read32(component,
		ret = snd_soc_component_read(component,
				   WM2200_INTERRUPT_RAW_STATUS_2);
		if (ret < 0) {
			dev_err(component->dev,
@@ -2060,7 +2060,7 @@ static int wm2200_dai_probe(struct snd_soc_dai *dai)
	unsigned int val = 0;
	int ret;

	ret = snd_soc_component_read32(component, WM2200_GPIO_CTRL_1);
	ret = snd_soc_component_read(component, WM2200_GPIO_CTRL_1);
	if (ret >= 0) {
		if ((ret & WM2200_GP1_FN_MASK) != 0) {
			wm2200->symmetric_rates = true;
+9 −9
Original line number Diff line number Diff line
@@ -137,7 +137,7 @@ static int wm5100_alloc_sr(struct snd_soc_component *component, int rate)
				sr_free = i;
				continue;
			}
			if ((snd_soc_component_read32(component, wm5100_sr_regs[i]) &
			if ((snd_soc_component_read(component, wm5100_sr_regs[i]) &
			     WM5100_SAMPLE_RATE_1_MASK) == sr_code)
				break;
		}
@@ -189,7 +189,7 @@ static void wm5100_free_sr(struct snd_soc_component *component, int rate)
		if (!wm5100->sr_ref[i])
			continue;

		if ((snd_soc_component_read32(component, wm5100_sr_regs[i]) &
		if ((snd_soc_component_read(component, wm5100_sr_regs[i]) &
		     WM5100_SAMPLE_RATE_1_MASK) == sr_code)
			break;
	}
@@ -738,9 +738,9 @@ static void wm5100_seq_notifier(struct snd_soc_component *component,

	/* Wait for the outputs to flag themselves as enabled */
	if (wm5100->out_ena[0]) {
		expect = snd_soc_component_read32(component, WM5100_CHANNEL_ENABLES_1);
		expect = snd_soc_component_read(component, WM5100_CHANNEL_ENABLES_1);
		for (i = 0; i < 200; i++) {
			val = snd_soc_component_read32(component, WM5100_OUTPUT_STATUS_1);
			val = snd_soc_component_read(component, WM5100_OUTPUT_STATUS_1);
			if (val == expect) {
				wm5100->out_ena[0] = false;
				break;
@@ -753,9 +753,9 @@ static void wm5100_seq_notifier(struct snd_soc_component *component,
	}

	if (wm5100->out_ena[1]) {
		expect = snd_soc_component_read32(component, WM5100_OUTPUT_ENABLES_2);
		expect = snd_soc_component_read(component, WM5100_OUTPUT_ENABLES_2);
		for (i = 0; i < 200; i++) {
			val = snd_soc_component_read32(component, WM5100_OUTPUT_STATUS_2);
			val = snd_soc_component_read(component, WM5100_OUTPUT_STATUS_2);
			if (val == expect) {
				wm5100->out_ena[1] = false;
				break;
@@ -841,13 +841,13 @@ static int wm5100_post_ev(struct snd_soc_dapm_widget *w,
	struct wm5100_priv *wm5100 = snd_soc_component_get_drvdata(component);
	int ret;

	ret = snd_soc_component_read32(component, WM5100_INTERRUPT_RAW_STATUS_3);
	ret = snd_soc_component_read(component, WM5100_INTERRUPT_RAW_STATUS_3);
	ret &= WM5100_SPK_SHUTDOWN_WARN_STS |
		WM5100_SPK_SHUTDOWN_STS | WM5100_CLKGEN_ERR_STS |
		WM5100_CLKGEN_ERR_ASYNC_STS;
	wm5100_log_status3(wm5100, ret);

	ret = snd_soc_component_read32(component, WM5100_INTERRUPT_RAW_STATUS_4);
	ret = snd_soc_component_read(component, WM5100_INTERRUPT_RAW_STATUS_4);
	wm5100_log_status4(wm5100, ret);

	return 0;
@@ -1848,7 +1848,7 @@ static int wm5100_set_fll(struct snd_soc_component *component, int fll_id, int s
			msleep(1);
		}

		ret = snd_soc_component_read32(component,
		ret = snd_soc_component_read(component,
				   WM5100_INTERRUPT_RAW_STATUS_3);
		if (ret < 0) {
			dev_err(component->dev,
+3 −3
Original line number Diff line number Diff line
@@ -290,7 +290,7 @@ static int wm5110_hp_pre_enable(struct snd_soc_dapm_widget *w)
	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
	struct arizona_priv *priv = snd_soc_component_get_drvdata(component);
	struct arizona *arizona = priv->arizona;
	unsigned int val = snd_soc_component_read32(component, ARIZONA_DRE_ENABLE);
	unsigned int val = snd_soc_component_read(component, ARIZONA_DRE_ENABLE);
	const struct reg_sequence *wseq;
	int nregs;

@@ -326,7 +326,7 @@ static int wm5110_hp_pre_disable(struct snd_soc_dapm_widget *w)
{
	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
	struct arizona_priv *priv = snd_soc_component_get_drvdata(component);
	unsigned int val = snd_soc_component_read32(component, ARIZONA_DRE_ENABLE);
	unsigned int val = snd_soc_component_read(component, ARIZONA_DRE_ENABLE);

	switch (w->shift) {
	case ARIZONA_OUT1L_ENA_SHIFT:
@@ -524,7 +524,7 @@ static int wm5110_in_analog_ev(struct snd_soc_dapm_widget *w,
		wm5110->in_post_pending++;
		return 0;
	case SND_SOC_DAPM_PRE_PMU:
		wm5110->in_pga_cache[w->shift] = snd_soc_component_read32(component, reg);
		wm5110->in_pga_cache[w->shift] = snd_soc_component_read(component, reg);

		snd_soc_component_update_bits(component, reg, mask,
				    0x40 << ARIZONA_IN1L_PGA_VOL_SHIFT);
+16 −16
Original line number Diff line number Diff line
@@ -331,7 +331,7 @@ static int wm8350_put_volsw_2r_vu(struct snd_kcontrol *kcontrol,
		return ret;

	/* now hit the volume update bits (always bit 8) */
	val = snd_soc_component_read32(component, reg);
	val = snd_soc_component_read(component, reg);
	snd_soc_component_write(component, reg, val | WM8350_OUT1_VU);
	return 1;
}
@@ -766,7 +766,7 @@ static int wm8350_set_dai_sysclk(struct snd_soc_dai *codec_dai,
	case WM8350_MCLK_SEL_PLL_32K:
		wm8350_set_bits(wm8350, WM8350_CLOCK_CONTROL_1,
				WM8350_MCLK_SEL);
		fll_4 = snd_soc_component_read32(component, WM8350_FLL_CONTROL_4) &
		fll_4 = snd_soc_component_read(component, WM8350_FLL_CONTROL_4) &
		    ~WM8350_FLL_CLK_SRC_MASK;
		snd_soc_component_write(component, WM8350_FLL_CONTROL_4, fll_4 | clk_id);
		break;
@@ -790,37 +790,37 @@ static int wm8350_set_clkdiv(struct snd_soc_dai *codec_dai, int div_id, int div)

	switch (div_id) {
	case WM8350_ADC_CLKDIV:
		val = snd_soc_component_read32(component, WM8350_ADC_DIVIDER) &
		val = snd_soc_component_read(component, WM8350_ADC_DIVIDER) &
		    ~WM8350_ADC_CLKDIV_MASK;
		snd_soc_component_write(component, WM8350_ADC_DIVIDER, val | div);
		break;
	case WM8350_DAC_CLKDIV:
		val = snd_soc_component_read32(component, WM8350_DAC_CLOCK_CONTROL) &
		val = snd_soc_component_read(component, WM8350_DAC_CLOCK_CONTROL) &
		    ~WM8350_DAC_CLKDIV_MASK;
		snd_soc_component_write(component, WM8350_DAC_CLOCK_CONTROL, val | div);
		break;
	case WM8350_BCLK_CLKDIV:
		val = snd_soc_component_read32(component, WM8350_CLOCK_CONTROL_1) &
		val = snd_soc_component_read(component, WM8350_CLOCK_CONTROL_1) &
		    ~WM8350_BCLK_DIV_MASK;
		snd_soc_component_write(component, WM8350_CLOCK_CONTROL_1, val | div);
		break;
	case WM8350_OPCLK_CLKDIV:
		val = snd_soc_component_read32(component, WM8350_CLOCK_CONTROL_1) &
		val = snd_soc_component_read(component, WM8350_CLOCK_CONTROL_1) &
		    ~WM8350_OPCLK_DIV_MASK;
		snd_soc_component_write(component, WM8350_CLOCK_CONTROL_1, val | div);
		break;
	case WM8350_SYS_CLKDIV:
		val = snd_soc_component_read32(component, WM8350_CLOCK_CONTROL_1) &
		val = snd_soc_component_read(component, WM8350_CLOCK_CONTROL_1) &
		    ~WM8350_MCLK_DIV_MASK;
		snd_soc_component_write(component, WM8350_CLOCK_CONTROL_1, val | div);
		break;
	case WM8350_DACLR_CLKDIV:
		val = snd_soc_component_read32(component, WM8350_DAC_LR_RATE) &
		val = snd_soc_component_read(component, WM8350_DAC_LR_RATE) &
		    ~WM8350_DACLRC_RATE_MASK;
		snd_soc_component_write(component, WM8350_DAC_LR_RATE, val | div);
		break;
	case WM8350_ADCLR_CLKDIV:
		val = snd_soc_component_read32(component, WM8350_ADC_LR_RATE) &
		val = snd_soc_component_read(component, WM8350_ADC_LR_RATE) &
		    ~WM8350_ADCLRC_RATE_MASK;
		snd_soc_component_write(component, WM8350_ADC_LR_RATE, val | div);
		break;
@@ -834,13 +834,13 @@ static int wm8350_set_clkdiv(struct snd_soc_dai *codec_dai, int div_id, int div)
static int wm8350_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
{
	struct snd_soc_component *component = codec_dai->component;
	u16 iface = snd_soc_component_read32(component, WM8350_AI_FORMATING) &
	u16 iface = snd_soc_component_read(component, WM8350_AI_FORMATING) &
	    ~(WM8350_AIF_BCLK_INV | WM8350_AIF_LRCLK_INV | WM8350_AIF_FMT_MASK);
	u16 master = snd_soc_component_read32(component, WM8350_AI_DAC_CONTROL) &
	u16 master = snd_soc_component_read(component, WM8350_AI_DAC_CONTROL) &
	    ~WM8350_BCLK_MSTR;
	u16 dac_lrc = snd_soc_component_read32(component, WM8350_DAC_LR_RATE) &
	u16 dac_lrc = snd_soc_component_read(component, WM8350_DAC_LR_RATE) &
	    ~WM8350_DACLRC_ENA;
	u16 adc_lrc = snd_soc_component_read32(component, WM8350_ADC_LR_RATE) &
	u16 adc_lrc = snd_soc_component_read(component, WM8350_ADC_LR_RATE) &
	    ~WM8350_ADCLRC_ENA;

	/* set master/slave audio interface */
@@ -907,7 +907,7 @@ static int wm8350_pcm_hw_params(struct snd_pcm_substream *substream,
	struct snd_soc_component *component = codec_dai->component;
	struct wm8350_data *wm8350_data = snd_soc_component_get_drvdata(component);
	struct wm8350 *wm8350 = wm8350_data->wm8350;
	u16 iface = snd_soc_component_read32(component, WM8350_AI_FORMATING) &
	u16 iface = snd_soc_component_read(component, WM8350_AI_FORMATING) &
	    ~WM8350_AIF_WL_MASK;

	/* bit size */
@@ -1047,7 +1047,7 @@ static int wm8350_set_fll(struct snd_soc_dai *codec_dai,
		fll_div.ratio);

	/* set up N.K & dividers */
	fll_1 = snd_soc_component_read32(component, WM8350_FLL_CONTROL_1) &
	fll_1 = snd_soc_component_read(component, WM8350_FLL_CONTROL_1) &
	    ~(WM8350_FLL_OUTDIV_MASK | WM8350_FLL_RSP_RATE_MASK | 0xc000);
	snd_soc_component_write(component, WM8350_FLL_CONTROL_1,
			   fll_1 | (fll_div.div << 8) | 0x50);
@@ -1055,7 +1055,7 @@ static int wm8350_set_fll(struct snd_soc_dai *codec_dai,
			   (fll_div.ratio << 11) | (fll_div.
						    n & WM8350_FLL_N_MASK));
	snd_soc_component_write(component, WM8350_FLL_CONTROL_3, fll_div.k);
	fll_4 = snd_soc_component_read32(component, WM8350_FLL_CONTROL_4) &
	fll_4 = snd_soc_component_read(component, WM8350_FLL_CONTROL_4) &
	    ~(WM8350_FLL_FRAC | WM8350_FLL_SLOW_LOCK_REF);
	snd_soc_component_write(component, WM8350_FLL_CONTROL_4,
			   fll_4 | (fll_div.k ? WM8350_FLL_FRAC : 0) |
+25 −25
Original line number Diff line number Diff line
@@ -98,7 +98,7 @@ static int wm8400_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol,
                return ret;

        /* now hit the volume update bits (always bit 8) */
        val = snd_soc_component_read32(component, reg);
	val = snd_soc_component_read(component, reg);
        return snd_soc_component_write(component, reg, val | 0x0100);
}

@@ -328,7 +328,7 @@ static int outmixer_event (struct snd_soc_dapm_widget *w,

	switch (reg_shift) {
	case WM8400_SPEAKER_MIXER | (WM8400_LDSPK << 8) :
		reg = snd_soc_component_read32(component, WM8400_OUTPUT_MIXER1);
		reg = snd_soc_component_read(component, WM8400_OUTPUT_MIXER1);
		if (reg & WM8400_LDLO) {
			printk(KERN_WARNING
			"Cannot set as Output Mixer 1 LDLO Set\n");
@@ -336,7 +336,7 @@ static int outmixer_event (struct snd_soc_dapm_widget *w,
		}
		break;
	case WM8400_SPEAKER_MIXER | (WM8400_RDSPK << 8):
		reg = snd_soc_component_read32(component, WM8400_OUTPUT_MIXER2);
		reg = snd_soc_component_read(component, WM8400_OUTPUT_MIXER2);
		if (reg & WM8400_RDRO) {
			printk(KERN_WARNING
			"Cannot set as Output Mixer 2 RDRO Set\n");
@@ -344,7 +344,7 @@ static int outmixer_event (struct snd_soc_dapm_widget *w,
		}
		break;
	case WM8400_OUTPUT_MIXER1 | (WM8400_LDLO << 8):
		reg = snd_soc_component_read32(component, WM8400_SPEAKER_MIXER);
		reg = snd_soc_component_read(component, WM8400_SPEAKER_MIXER);
		if (reg & WM8400_LDSPK) {
			printk(KERN_WARNING
			"Cannot set as Speaker Mixer LDSPK Set\n");
@@ -352,7 +352,7 @@ static int outmixer_event (struct snd_soc_dapm_widget *w,
		}
		break;
	case WM8400_OUTPUT_MIXER2 | (WM8400_RDRO << 8):
		reg = snd_soc_component_read32(component, WM8400_SPEAKER_MIXER);
		reg = snd_soc_component_read(component, WM8400_SPEAKER_MIXER);
		if (reg & WM8400_RDSPK) {
			printk(KERN_WARNING
			"Cannot set as Speaker Mixer RDSPK Set\n");
@@ -957,11 +957,11 @@ static int wm8400_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
	wm8400->fll_in = freq_in;

	/* We *must* disable the FLL before any changes */
	reg = snd_soc_component_read32(component, WM8400_POWER_MANAGEMENT_2);
	reg = snd_soc_component_read(component, WM8400_POWER_MANAGEMENT_2);
	reg &= ~WM8400_FLL_ENA;
	snd_soc_component_write(component, WM8400_POWER_MANAGEMENT_2, reg);

	reg = snd_soc_component_read32(component, WM8400_FLL_CONTROL_1);
	reg = snd_soc_component_read(component, WM8400_FLL_CONTROL_1);
	reg &= ~WM8400_FLL_OSC_ENA;
	snd_soc_component_write(component, WM8400_FLL_CONTROL_1, reg);

@@ -976,7 +976,7 @@ static int wm8400_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
	snd_soc_component_write(component, WM8400_FLL_CONTROL_2, factors.k);
	snd_soc_component_write(component, WM8400_FLL_CONTROL_3, factors.n);

	reg = snd_soc_component_read32(component, WM8400_FLL_CONTROL_4);
	reg = snd_soc_component_read(component, WM8400_FLL_CONTROL_4);
	reg &= ~WM8400_FLL_OUTDIV_MASK;
	reg |= factors.outdiv;
	snd_soc_component_write(component, WM8400_FLL_CONTROL_4, reg);
@@ -993,8 +993,8 @@ static int wm8400_set_dai_fmt(struct snd_soc_dai *codec_dai,
	struct snd_soc_component *component = codec_dai->component;
	u16 audio1, audio3;

	audio1 = snd_soc_component_read32(component, WM8400_AUDIO_INTERFACE_1);
	audio3 = snd_soc_component_read32(component, WM8400_AUDIO_INTERFACE_3);
	audio1 = snd_soc_component_read(component, WM8400_AUDIO_INTERFACE_1);
	audio3 = snd_soc_component_read(component, WM8400_AUDIO_INTERFACE_3);

	/* set master/slave audio interface */
	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
@@ -1048,22 +1048,22 @@ static int wm8400_set_dai_clkdiv(struct snd_soc_dai *codec_dai,

	switch (div_id) {
	case WM8400_MCLK_DIV:
		reg = snd_soc_component_read32(component, WM8400_CLOCKING_2) &
		reg = snd_soc_component_read(component, WM8400_CLOCKING_2) &
			~WM8400_MCLK_DIV_MASK;
		snd_soc_component_write(component, WM8400_CLOCKING_2, reg | div);
		break;
	case WM8400_DACCLK_DIV:
		reg = snd_soc_component_read32(component, WM8400_CLOCKING_2) &
		reg = snd_soc_component_read(component, WM8400_CLOCKING_2) &
			~WM8400_DAC_CLKDIV_MASK;
		snd_soc_component_write(component, WM8400_CLOCKING_2, reg | div);
		break;
	case WM8400_ADCCLK_DIV:
		reg = snd_soc_component_read32(component, WM8400_CLOCKING_2) &
		reg = snd_soc_component_read(component, WM8400_CLOCKING_2) &
			~WM8400_ADC_CLKDIV_MASK;
		snd_soc_component_write(component, WM8400_CLOCKING_2, reg | div);
		break;
	case WM8400_BCLK_DIV:
		reg = snd_soc_component_read32(component, WM8400_CLOCKING_1) &
		reg = snd_soc_component_read(component, WM8400_CLOCKING_1) &
			~WM8400_BCLK_DIV_MASK;
		snd_soc_component_write(component, WM8400_CLOCKING_1, reg | div);
		break;
@@ -1082,7 +1082,7 @@ static int wm8400_hw_params(struct snd_pcm_substream *substream,
	struct snd_soc_dai *dai)
{
	struct snd_soc_component *component = dai->component;
	u16 audio1 = snd_soc_component_read32(component, WM8400_AUDIO_INTERFACE_1);
	u16 audio1 = snd_soc_component_read(component, WM8400_AUDIO_INTERFACE_1);

	audio1 &= ~WM8400_AIF_WL_MASK;
	/* bit size */
@@ -1107,7 +1107,7 @@ static int wm8400_hw_params(struct snd_pcm_substream *substream,
static int wm8400_mute(struct snd_soc_dai *dai, int mute)
{
	struct snd_soc_component *component = dai->component;
	u16 val = snd_soc_component_read32(component, WM8400_DAC_CTRL) & ~WM8400_DAC_MUTE;
	u16 val = snd_soc_component_read(component, WM8400_DAC_CTRL) & ~WM8400_DAC_MUTE;

	if (mute)
		snd_soc_component_write(component, WM8400_DAC_CTRL, val | WM8400_DAC_MUTE);
@@ -1131,7 +1131,7 @@ static int wm8400_set_bias_level(struct snd_soc_component *component,

	case SND_SOC_BIAS_PREPARE:
		/* VMID=2*50k */
		val = snd_soc_component_read32(component, WM8400_POWER_MANAGEMENT_1) &
		val = snd_soc_component_read(component, WM8400_POWER_MANAGEMENT_1) &
			~WM8400_VMID_MODE_MASK;
		snd_soc_component_write(component, WM8400_POWER_MANAGEMENT_1, val | 0x2);
		break;
@@ -1157,7 +1157,7 @@ static int wm8400_set_bias_level(struct snd_soc_component *component,
			msleep(50);

			/* Enable VREF & VMID at 2x50k */
			val = snd_soc_component_read32(component, WM8400_POWER_MANAGEMENT_1);
			val = snd_soc_component_read(component, WM8400_POWER_MANAGEMENT_1);
			val |= 0x2 | WM8400_VREF_ENA;
			snd_soc_component_write(component, WM8400_POWER_MANAGEMENT_1, val);

@@ -1171,7 +1171,7 @@ static int wm8400_set_bias_level(struct snd_soc_component *component,
		}

		/* VMID=2*300k */
		val = snd_soc_component_read32(component, WM8400_POWER_MANAGEMENT_1) &
		val = snd_soc_component_read(component, WM8400_POWER_MANAGEMENT_1) &
			~WM8400_VMID_MODE_MASK;
		snd_soc_component_write(component, WM8400_POWER_MANAGEMENT_1, val | 0x4);
		break;
@@ -1187,11 +1187,11 @@ static int wm8400_set_bias_level(struct snd_soc_component *component,
			WM8400_BUFIOEN);

		/* mute DAC */
		val = snd_soc_component_read32(component, WM8400_DAC_CTRL);
		val = snd_soc_component_read(component, WM8400_DAC_CTRL);
		snd_soc_component_write(component, WM8400_DAC_CTRL, val | WM8400_DAC_MUTE);

		/* Enable any disabled outputs */
		val = snd_soc_component_read32(component, WM8400_POWER_MANAGEMENT_1);
		val = snd_soc_component_read(component, WM8400_POWER_MANAGEMENT_1);
		val |= WM8400_SPK_ENA | WM8400_OUT3_ENA |
			WM8400_OUT4_ENA | WM8400_LOUT_ENA |
			WM8400_ROUT_ENA;
@@ -1293,14 +1293,14 @@ static int wm8400_component_probe(struct snd_soc_component *component)

	wm8400_component_reset(component);

	reg = snd_soc_component_read32(component, WM8400_POWER_MANAGEMENT_1);
	reg = snd_soc_component_read(component, WM8400_POWER_MANAGEMENT_1);
	snd_soc_component_write(component, WM8400_POWER_MANAGEMENT_1, reg | WM8400_CODEC_ENA);

	/* Latch volume update bits */
	reg = snd_soc_component_read32(component, WM8400_LEFT_LINE_INPUT_1_2_VOLUME);
	reg = snd_soc_component_read(component, WM8400_LEFT_LINE_INPUT_1_2_VOLUME);
	snd_soc_component_write(component, WM8400_LEFT_LINE_INPUT_1_2_VOLUME,
		     reg & WM8400_IPVU);
	reg = snd_soc_component_read32(component, WM8400_RIGHT_LINE_INPUT_1_2_VOLUME);
	reg = snd_soc_component_read(component, WM8400_RIGHT_LINE_INPUT_1_2_VOLUME);
	snd_soc_component_write(component, WM8400_RIGHT_LINE_INPUT_1_2_VOLUME,
		     reg & WM8400_IPVU);

@@ -1314,7 +1314,7 @@ static void wm8400_component_remove(struct snd_soc_component *component)
{
	u16 reg;

	reg = snd_soc_component_read32(component, WM8400_POWER_MANAGEMENT_1);
	reg = snd_soc_component_read(component, WM8400_POWER_MANAGEMENT_1);
	snd_soc_component_write(component, WM8400_POWER_MANAGEMENT_1,
		     reg & (~WM8400_CODEC_ENA));
}
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