Commit 6d61e70c authored by Dave Airlie's avatar Dave Airlie
Browse files

Backmerge tag 'v4.12-rc7' into drm-next 

Linux 4.12-rc7

Needed at least rc6 for drm-misc-next-fixes, may as well go to rc7
parents 338ffbf7 c0bc126f

Documentation/admin-guide/kernel-parameters.txt

+7 −0
Original line number Diff line number Diff line
@@ -3811,6 +3811,13 @@ 
			expediting.  Set to zero to disable automatic

			expediting.



	stack_guard_gap=	[MM]

			override the default stack gap protection. The value

			is in page units and it defines how many pages prior

			to (for stacks growing down) resp. after (for stacks

			growing up) the main stack are reserved for no other

			mapping. Default value is 256 pages.



	stacktrace	[FTRACE]

			Enabled the stack tracer on boot up.

Documentation/devicetree/bindings/clock/sunxi-ccu.txt

+4 −3
Original line number Diff line number Diff line
@@ -22,7 +22,8 @@ Required properties : 
- #clock-cells : must contain 1

- #reset-cells : must contain 1



For the PRCM CCUs on H3/A64, one more clock is needed:

For the PRCM CCUs on H3/A64, two more clocks are needed:

- "pll-periph": the SoC's peripheral PLL from the main CCU

- "iosc": the SoC's internal frequency oscillator



Example for generic CCU:
@@ -39,8 +40,8 @@ Example for PRCM CCU: 
r_ccu: clock@01f01400 {

	compatible = "allwinner,sun50i-a64-r-ccu";

	reg = <0x01f01400 0x100>;

	clocks = <&osc24M>, <&osc32k>, <&iosc>;

	clock-names = "hosc", "losc", "iosc";

	clocks = <&osc24M>, <&osc32k>, <&iosc>, <&ccu CLK_PLL_PERIPH0>;

	clock-names = "hosc", "losc", "iosc", "pll-periph";

	#clock-cells = <1>;

	#reset-cells = <1>;

};

Documentation/devicetree/bindings/gpio/gpio-mvebu.txt

+3 −3
Original line number Diff line number Diff line
@@ -41,9 +41,9 @@ Required properties: 
Optional properties:



In order to use the GPIO lines in PWM mode, some additional optional

properties are required. Only Armada 370 and XP support these properties.

properties are required.



- compatible: Must contain "marvell,armada-370-xp-gpio"

- compatible: Must contain "marvell,armada-370-gpio"



- reg: an additional register set is needed, for the GPIO Blink

  Counter on/off registers.
@@ -71,7 +71,7 @@ Example: 
		};



		gpio1: gpio@18140 {

			compatible = "marvell,armada-370-xp-gpio";

			compatible = "marvell,armada-370-gpio";

			reg = <0x18140 0x40>, <0x181c8 0x08>;

			reg-names = "gpio", "pwm";

			ngpios = <17>;

Documentation/devicetree/bindings/mfd/stm32-timers.txt

+1 −1
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@@ -31,7 +31,7 @@ Example: 
		compatible = "st,stm32-timers";

		reg = <0x40010000 0x400>;

		clocks = <&rcc 0 160>;

		clock-names = "clk_int";

		clock-names = "int";



		pwm {

			compatible = "st,stm32-pwm";

Documentation/devicetree/bindings/net/dsa/b53.txt

+1 −1
Original line number Diff line number Diff line
@@ -34,7 +34,7 @@ Required properties: 
      "brcm,bcm6328-switch"

      "brcm,bcm6368-switch" and the mandatory "brcm,bcm63xx-switch"



See Documentation/devicetree/bindings/dsa/dsa.txt for a list of additional

See Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of additional

required and optional properties.



Examples: