Commit 6d5e3c31 authored by Paolo Bonzini's avatar Paolo Bonzini
Browse files

Merge tag 'kvm-x86-misc-6.6' of https://github.com/kvm-x86/linux into HEAD 

KVM x86 changes for 6.6:

 - Misc cleanups

 - Retry APIC optimized recalculation if a vCPU is added/enabled

 - Overhaul emergency reboot code to bring SVM up to par with VMX, tie the
   "emergency disabling" behavior to KVM actually being loaded, and move all of
   the logic within KVM

 - Fix user triggerable WARNs in SVM where KVM incorrectly assumes the TSC
   ratio MSR can diverge from the default iff TSC scaling is enabled, and clean
   up related code

 - Add a framework to allow "caching" feature flags so that KVM can check if
   the guest can use a feature without needing to search guest CPUID
parents bd7fe98b 9717efbe

arch/x86/include/asm/kexec.h

+0 −2
Original line number Diff line number Diff line
@@ -205,8 +205,6 @@ int arch_kimage_file_post_load_cleanup(struct kimage *image); 
#endif

#endif



typedef void crash_vmclear_fn(void);

extern crash_vmclear_fn __rcu *crash_vmclear_loaded_vmcss;

extern void kdump_nmi_shootdown_cpus(void);



#endif /* __ASSEMBLY__ */

arch/x86/include/asm/kvm_host.h

+21 −3
Original line number Diff line number Diff line
@@ -746,7 +746,6 @@ struct kvm_vcpu_arch { 
	u64 smi_count;

	bool at_instruction_boundary;

	bool tpr_access_reporting;

	bool xsaves_enabled;

	bool xfd_no_write_intercept;

	u64 ia32_xss;

	u64 microcode_version;
@@ -831,6 +830,25 @@ struct kvm_vcpu_arch { 
	struct kvm_cpuid_entry2 *cpuid_entries;

	struct kvm_hypervisor_cpuid kvm_cpuid;



	/*

	 * FIXME: Drop this macro and use KVM_NR_GOVERNED_FEATURES directly

	 * when "struct kvm_vcpu_arch" is no longer defined in an

	 * arch/x86/include/asm header.  The max is mostly arbitrary, i.e.

	 * can be increased as necessary.

	 */

#define KVM_MAX_NR_GOVERNED_FEATURES BITS_PER_LONG



	/*

	 * Track whether or not the guest is allowed to use features that are

	 * governed by KVM, where "governed" means KVM needs to manage state

	 * and/or explicitly enable the feature in hardware.  Typically, but

	 * not always, governed features can be used by the guest if and only

	 * if both KVM and userspace want to expose the feature to the guest.

	 */

	struct {

		DECLARE_BITMAP(enabled, KVM_MAX_NR_GOVERNED_FEATURES);

	} governed_features;



	u64 reserved_gpa_bits;

	int maxphyaddr;
@@ -1655,8 +1673,8 @@ struct kvm_x86_ops { 


	u64 (*get_l2_tsc_offset)(struct kvm_vcpu *vcpu);

	u64 (*get_l2_tsc_multiplier)(struct kvm_vcpu *vcpu);

	void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);

	void (*write_tsc_multiplier)(struct kvm_vcpu *vcpu, u64 multiplier);

	void (*write_tsc_offset)(struct kvm_vcpu *vcpu);

	void (*write_tsc_multiplier)(struct kvm_vcpu *vcpu);



	/*

	 * Retrieve somewhat arbitrary exit information.  Intended to

arch/x86/include/asm/reboot.h

+7 −0
Original line number Diff line number Diff line
@@ -25,7 +25,14 @@ void __noreturn machine_real_restart(unsigned int type); 
#define MRR_BIOS	0

#define MRR_APM		1



#if IS_ENABLED(CONFIG_KVM_INTEL) || IS_ENABLED(CONFIG_KVM_AMD)

typedef void (cpu_emergency_virt_cb)(void);

void cpu_emergency_register_virt_callback(cpu_emergency_virt_cb *callback);

void cpu_emergency_unregister_virt_callback(cpu_emergency_virt_cb *callback);

void cpu_emergency_disable_virtualization(void);

#else

static inline void cpu_emergency_disable_virtualization(void) {}

#endif /* CONFIG_KVM_INTEL || CONFIG_KVM_AMD */



typedef void (*nmi_shootdown_cb)(int, struct pt_regs*);

void nmi_shootdown_cpus(nmi_shootdown_cb callback);

arch/x86/include/asm/virtext.h

deleted100644 → 0
+0 −154
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-only */

/* CPU virtualization extensions handling

 *

 * This should carry the code for handling CPU virtualization extensions

 * that needs to live in the kernel core.

 *

 * Author: Eduardo Habkost <ehabkost@redhat.com>

 *

 * Copyright (C) 2008, Red Hat Inc.

 *

 * Contains code from KVM, Copyright (C) 2006 Qumranet, Inc.

 */

#ifndef _ASM_X86_VIRTEX_H

#define _ASM_X86_VIRTEX_H



#include <asm/processor.h>



#include <asm/vmx.h>

#include <asm/svm.h>

#include <asm/tlbflush.h>



/*

 * VMX functions:

 */



static inline int cpu_has_vmx(void)

{

	unsigned long ecx = cpuid_ecx(1);

	return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */

}





/**

 * cpu_vmxoff() - Disable VMX on the current CPU

 *

 * Disable VMX and clear CR4.VMXE (even if VMXOFF faults)

 *

 * Note, VMXOFF causes a #UD if the CPU is !post-VMXON, but it's impossible to

 * atomically track post-VMXON state, e.g. this may be called in NMI context.

 * Eat all faults as all other faults on VMXOFF faults are mode related, i.e.

 * faults are guaranteed to be due to the !post-VMXON check unless the CPU is

 * magically in RM, VM86, compat mode, or at CPL>0.

 */

static inline int cpu_vmxoff(void)

{

	asm_volatile_goto("1: vmxoff\n\t"

			  _ASM_EXTABLE(1b, %l[fault])

			  ::: "cc", "memory" : fault);



	cr4_clear_bits(X86_CR4_VMXE);

	return 0;



fault:

	cr4_clear_bits(X86_CR4_VMXE);

	return -EIO;

}



static inline int cpu_vmx_enabled(void)

{

	return __read_cr4() & X86_CR4_VMXE;

}



/** Disable VMX if it is enabled on the current CPU

 *

 * You shouldn't call this if cpu_has_vmx() returns 0.

 */

static inline void __cpu_emergency_vmxoff(void)

{

	if (cpu_vmx_enabled())

		cpu_vmxoff();

}



/** Disable VMX if it is supported and enabled on the current CPU

 */

static inline void cpu_emergency_vmxoff(void)

{

	if (cpu_has_vmx())

		__cpu_emergency_vmxoff();

}









/*

 * SVM functions:

 */



/** Check if the CPU has SVM support

 *

 * You can use the 'msg' arg to get a message describing the problem,

 * if the function returns zero. Simply pass NULL if you are not interested

 * on the messages; gcc should take care of not generating code for

 * the messages on this case.

 */

static inline int cpu_has_svm(const char **msg)

{

	if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD &&

	    boot_cpu_data.x86_vendor != X86_VENDOR_HYGON) {

		if (msg)

			*msg = "not amd or hygon";

		return 0;

	}



	if (boot_cpu_data.extended_cpuid_level < SVM_CPUID_FUNC) {

		if (msg)

			*msg = "can't execute cpuid_8000000a";

		return 0;

	}



	if (!boot_cpu_has(X86_FEATURE_SVM)) {

		if (msg)

			*msg = "svm not available";

		return 0;

	}

	return 1;

}





/** Disable SVM on the current CPU

 *

 * You should call this only if cpu_has_svm() returned true.

 */

static inline void cpu_svm_disable(void)

{

	uint64_t efer;



	wrmsrl(MSR_VM_HSAVE_PA, 0);

	rdmsrl(MSR_EFER, efer);

	if (efer & EFER_SVME) {

		/*

		 * Force GIF=1 prior to disabling SVM to ensure INIT and NMI

		 * aren't blocked, e.g. if a fatal error occurred between CLGI

		 * and STGI.  Note, STGI may #UD if SVM is disabled from NMI

		 * context between reading EFER and executing STGI.  In that

		 * case, GIF must already be set, otherwise the NMI would have

		 * been blocked, so just eat the fault.

		 */

		asm_volatile_goto("1: stgi\n\t"

				  _ASM_EXTABLE(1b, %l[fault])

				  ::: "memory" : fault);

fault:

		wrmsrl(MSR_EFER, efer & ~EFER_SVME);

	}

}



/** Makes sure SVM is disabled, if it is supported on the CPU

 */

static inline void cpu_emergency_svm_disable(void)

{

	if (cpu_has_svm(NULL))

		cpu_svm_disable();

}



#endif /* _ASM_X86_VIRTEX_H */

arch/x86/include/asm/vmx.h

+1 −1
Original line number Diff line number Diff line
@@ -71,7 +71,7 @@ 
#define SECONDARY_EXEC_RDSEED_EXITING		VMCS_CONTROL_BIT(RDSEED_EXITING)

#define SECONDARY_EXEC_ENABLE_PML               VMCS_CONTROL_BIT(PAGE_MOD_LOGGING)

#define SECONDARY_EXEC_PT_CONCEAL_VMX		VMCS_CONTROL_BIT(PT_CONCEAL_VMX)

#define SECONDARY_EXEC_XSAVES			VMCS_CONTROL_BIT(XSAVES)

#define SECONDARY_EXEC_ENABLE_XSAVES		VMCS_CONTROL_BIT(XSAVES)

#define SECONDARY_EXEC_MODE_BASED_EPT_EXEC	VMCS_CONTROL_BIT(MODE_BASED_EPT_EXEC)

#define SECONDARY_EXEC_PT_USE_GPA		VMCS_CONTROL_BIT(PT_USE_GPA)

#define SECONDARY_EXEC_TSC_SCALING              VMCS_CONTROL_BIT(TSC_SCALING)